MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 335
MC9S12XDP512MAG
Manufacturer Part Number
MC9S12XDP512MAG
Description
Manufacturer
Freescale
Datasheet
1.MC9S12XDP512MAG.pdf
(1348 pages)
Specifications of MC9S12XDP512MAG
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
119
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(24-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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Read: Anytime
Write: Anytime
All bits reset to zero.
The two 8-bit pulse accumulators PAC3 and PAC2 are cascaded to form the PACA 16-bit pulse
accumulator. When PACA in enabled (PAEN = 1 in PACTL), the PACN3 and PACN2 registers contents
are respectively the high and low byte of the PACA.
When PACN3 overflows from 0x00FF to 0x0000, the interrupt flag PAOVF in PAFLG is set.
Full count register access will take place in one clock cycle.
7.3.2.18
Read: Anytime
Write: Anytime
All bits reset to zero.
The two 8-bit pulse accumulators PAC1 and PAC0 are cascaded to form the PACB 16-bit pulse
accumulator. When PACB in enabled, (PBEN = 1 in PBCTL) the PACN1 and PACN0 registers contents
are respectively the high and low byte of the PACB.
Freescale Semiconductor
Reset
Reset
Reset
W
W
W
R
R
R
PACNT7(15) PACNT6(14) PACNT5(13) PACNT4(12) PACNT3(11) PACNT2(10)
PACNT7
PACNT7
Pulse Accumulators Count Registers (PACN1 and PACN0)
0
0
0
7
7
7
A separate read/write for high byte and low byte will give a different result
than accessing them as a word.
When clocking pulse and write to the registers occurs simultaneously, write
takes priority and the register is not incremented.
PACNT6
PACNT6
Figure 7-38. Pulse Accumulators Count Register 2 (PACN2)
Figure 7-39. Pulse Accumulators Count Register 1 (PACN1)
Figure 7-40. Pulse Accumulators Count Register 0 (PACN0)
0
0
0
6
6
6
PACNT5
PACNT5
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
0
5
5
5
PACNT4
PACNT4
NOTE
0
0
0
4
4
4
PACNT3
PACNT3
Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
0
0
0
3
3
3
PACNT2
PACNT2
0
0
0
2
2
2
PACNT1(9)
PACNT1
PACNT1
0
0
0
1
1
1
PACNT0(8)
PACNT0
PACNT0
0
0
0
0
0
0
335
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