MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 1122

• Manufacturer Part Number: MC9S12XDP512MAG
• Manufacturer: Freescale

Specifications of MC9S12XDP512MAG

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(24-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Chapter 27 512 Kbyte Flash Module (S12XFTX512K4V2)
The FCTL register is loaded from the Flash Configuration Field byte at global address 0x7F_FF0E during
the reset sequence, indicated by F in
27.3.2.9
The FADDRHI and FADDRLO registers are the Flash address registers.
All FADDRHI and FADDRLO bits are readable but are not writable. After an array write as part of a
command write sequence, the FADDR registers will contain the mapped MCU address written.
27.3.2.10 Flash Data Registers (FDATA)
The FDATAHI and FDATALO registers are the Flash data registers.
1124
NV[7:0]
Reset
Reset
Reset
Field
7-0
W
W
W
R
R
R
Non volatile Bits — The NV[7:0] bits are available as nonvolatile bits. Refer to the Device User Guide for proper
use of the NV bits.
Flash Address Registers (FADDR)
0
0
0
7
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 27-17. Flash Address Low Register (FADDRLO)
0
Figure 27-16. Flash Address High Register (FADDRHI)
0
0
6
6
6
Figure 27-18. Flash Data High Register (FDATAHI)
Table 27-19. FCTL Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure
0
0
0
5
5
5
27-15.
0
0
0
4
4
4
FADDRLO
FADDRHI
FDATAHI
Description
0
0
0
3
3
3
0
0
0
2
2
2
Freescale Semiconductor
0
0
0
1
1
1
0
0
0
0
0
0