MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 162
MC9S12XDP512MAG
Manufacturer Part Number
MC9S12XDP512MAG
Description
Manufacturer
Freescale
Datasheet
1.MC9S12XDP512MAG.pdf
(1348 pages)
Specifications of MC9S12XDP512MAG
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
119
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(24-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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Chapter 5 Analog-to-Digital Converter (S12ATD10B8CV2)
5.3
This section provides a detailed description of all registers accessible in the ATD.
5.3.1
Figure 5-2
5.3.2
This section describes in address order all the ATD registers and their individual bits.
162
Unimplemente
ATDTEST0
ATDTEST1
ATDSTAT0
ATDCTL0
ATDCTL1
ATDCTL2
ATDCTL3
ATDCTL4
ATDCTL5
Register
Name
d
Memory Map and Register Definition
gives an overview of all ATD registers.
Module Memory Map
Register Descriptions
Register Address = Base Address + Address Offset, where the Base Address
is defined at the MCU level and the Address Offset is defined at the module
level.
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
ETRIGSEL
SRES8
ADPU
Bit 7
DJM
SCF
U
U
0
0
Figure 5-2. ATD Register Summary (Sheet 1 of 5)
= Unimplemented or Reserved
DSGN
SMP1
AFFC
MC9S12XDP512 Data Sheet, Rev. 2.21
S8C
U
U
6
0
0
0
ETORF
SMP0
SCAN
AWAI
S4C
U
5
0
0
0
NOTE
ETRIGLE
FIFOR
PRS4
MULT
S2C
U
4
0
0
0
ETRIGP
PRS3
S1C
U
3
0
0
0
0
0
ETRIGCH2 ETRIGCH1 ETRIGCH0
ETRIGE
WRAP2
PRS2
FIFO
CC2
CC
U
2
0
Freescale Semiconductor
WRAP1
ASCIE
PRS1
FRZ1
CC1
CB
U
1
0
WRAP0
ASCIF
PRS0
FRZ0
Bit 0
CC0
CA
SC
U
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