W83627SF-AW Winbond, W83627SF-AW Datasheet - Page 96

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W83627SF-AW

Manufacturer Part Number
W83627SF-AW
Description
Manufacturer
Winbond
Datasheet

Specifications of W83627SF-AW

Pin Count
128
Lead Free Status / RoHS Status
Not Compliant
15.7 Logical Device 6 (CIR)
CR30 (Default 0x00)
CR60, CR 61 (Default 0x00, 0x00)
CR70 (Default 0x00)
15.8 Logical Device 7 (Game Port and MIDI Port and GPIO Port 1)
CR30 (Default 0x00)
CR60, CR 61 (Default 0x02, 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR62, CR 63 (Default 0x03, 0x30 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR70 (Default 0x09 if PNPCSV = 0 during POR, default 0x00 otherwise)
CRF0 (GP10-GP17 I/O selection register. Default 0xFF)
When set to a '1', respective GPIO port is programmed as an input port.
When set to a '0', respective GPIO port is programmed as an output port.
These two registers select CIR I/O base address [0x100:0xFF8] on 8 byte boundary.
These two registers select the Game Port base address [0x100:0xFFF] on 1 byte boundary.
These two registers select the MIDI Port base address [0x100:0xFFF] on 2 byte boundary.
Bit 1
Bit 0
Bit 7 - 1 : Reserved.
Bit 0
Bit 7 - 4 : Reserved.
Bit [3:0] These bits select IRQ resource for CIR.
Bit 7 - 3 : Reserved.
Bit 2
Bit 1
Bit 0
Bit 7 - 4 : Reserved.
Bit [3:0] : These bits select IRQ resource for MIDI Port .
= 0 Gate20 software control.
= 1 Gate20 hardware speed up.
= 0 KBRST software control.
= 1 KBRST hardware speed up.
= 1 Activates the logical device.
= 0 Logical device is inactive.
= 1 Activate MIDI Port.
= 0 MIDI Port is disabled if bit 0 is also 0.
= 1 Activate Game Port.
= 0 Game Port is is disabled if bit 0 is also 0.
= 1 Activate both Game Port and MIDI Port.
= 0 Game Port is disabled is bit1 is also 0. MIDI Port is disabled if bit2 is also 0.
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W83627SF

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