W83627SF-AW Winbond, W83627SF-AW Datasheet - Page 3

• Manufacturer Part Number: W83627SF-AW
• Manufacturer: Winbond

Specifications of W83627SF-AW

• Pin Count: 128
• Lead Free Status / RoHS Status: Not Compliant

7.
8.
CIR RECEIVER PORT................................................................................................................. 41
7.1
PARALLEL PORT ........................................................................................................................ 47
8.1
8.2
8.3
6.2.3
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
6.2.9
CIR Registers ..................................................................................................................... 41
7.1.1
7.1.2
7.1.3
7.1.4
7.1.5
7.1.6
7.1.7
7.1.8
7.1.9
7.1.10 Bank1.Reg2 - Version ID Register I (VID) ............................................................................46
7.1.11 Bank0~3.Reg3 - CIR Control Register 0/Bank Select Register (CTR0/BSR) (BANK0~3)....46
7.1.12 Bank1.Reg4 - Timer Low Byte Register (TMRL) ..................................................................46
7.1.13 Bank1.Reg5 - Timer High Byte Register (TMRH).................................................................47
Printer Interface Logic ........................................................................................................ 47
Enhanced Parallel Port (EPP)............................................................................................ 48
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.2.6
8.2.7
8.2.8
Extended Capabilities Parallel (ECP) Port......................................................................... 53
8.3.1
8.3.2
8.3.3
8.3.4
8.3.5
8.3.6
Handshake Control Register (HCR) (Read/Write) ................................................................35
Handshake Status Register (HSR) (Read/Write) .................................................................36
UART FIFO Control Register (UFR) (Write only) .................................................................37
Interrupt Status Register (ISR) (Read only)..........................................................................38
Interrupt Control Register (ICR) (Read/Write) ......................................................................39
Programmable Baud Generator (BLL/BHL) (Read/Write) ....................................................39
User-defined Register (UDR) (Read/Write) ..........................................................................40
Bank0.Reg0 - Receiver Buffer Registers (RBR) (Read).......................................................41
Bank0.Reg1 - Interrupt Control Register (ICR).....................................................................41
Bank0.Reg2 - Interrupt Status Register (ISR) ......................................................................41
Bank0~3.Reg3 - CIR Control Register 0/Bank Select Register (CTR0/BSR) (BANK0~3)....42
Bank0.Reg4 - CIR Control Register (CTR)...........................................................................42
Bank0.Reg5 - UART Line Status Register (USR) ................................................................43
Bank0.Reg6 - Remote Infrared Config Register (RIR_CFG)................................................44
Bank0.Reg7 - User Defined Register (UDR/AUDR) .............................................................45
Bank1.Reg0~1 - Baud Rate Divisor Latch (BLL/BHL) ..........................................................45
Data Swapper ......................................................................................................................49
Printer Status Buffer.............................................................................................................49
Printer Control Latch and Printer Control Swapper ..............................................................49
EPP Address Port ................................................................................................................50
EPP Data Port 0-3................................................................................................................51
Bit Map of Parallel Port and EPP Registers .........................................................................51
EPP Pin Descriptions ...........................................................................................................52
EPP Operation .....................................................................................................................52
ECP Register and Mode Definitions .....................................................................................53
Data and ecpAFifo Port ........................................................................................................54
Device Status Register (DSR)..............................................................................................54
Device Control Register (DCR) ............................................................................................55
cFifo (Parallel Port Data FIFO) Mode = 010.........................................................................56
ecpDFifo (ECP Data FIFO) Mode = 011 ..............................................................................56
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Publication Release Date: May 31, 2005
W83627SF
Revision A1