W83627SF-AW Winbond, W83627SF-AW Datasheet - Page 36

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W83627SF-AW

Manufacturer Part Number
W83627SF-AW
Description
Manufacturer
Winbond
Datasheet

Specifications of W83627SF-AW

Pin Count
128
Lead Free Status / RoHS Status
Not Compliant
6.2.4 Handshake Status Register (HSR) (Read/Write)
This register reflects the current state of four input pins for handshake peripherals such as a modem
and records changes on these pins.
Bit 7: This bit is the opposite of the DCD input. This bit is equivalent to bit 3 of HCR in loopback
Bit 6: This bit is the opposite of the RI input. This bit is equivalent to bit 2 of HCR in loopback mode.
Bit 5: This bit is the opposite of the DSR input. This bit is equivalent to bit 0 of HCR in loopback
Bit 4: This bit is the opposite of the CTS input. This bit is equivalent to bit 1 of HCR in loopback
Bit 3: TDCD. This bit indicates that the DCD pin has changed state after HSR was read by the
Bit 2:
Bit 1: TDSR. This bit indicates that the DSR pin has changed state after HSR was read by the CPU.
Bit 0: TCTS. This bit indicates that the CTS pin has changed state after HSR was read.
mode.
mode.
mode.
read
CPU.
FERI. This bit indicates that the RI pin has changed from low to high state after HSR was
by the CPU.
7
6
5
4
3
2
1
-36-
0
Clear to send (CTS)
Data set ready (DSR)
Ring indicator (RI)
Data carrier detect (DCD)
RI falling edge (FERI)
DCD toggling (TDCD)
CTS toggling (TCTS)
DSR toggling (TDSR)
W83627SF

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