W83627SF-AW Winbond, W83627SF-AW Datasheet - Page 11

• Manufacturer Part Number: W83627SF-AW
• Manufacturer: Winbond

Specifications of W83627SF-AW

• Pin Count: 128
• Lead Free Status / RoHS Status: Not Compliant

4. PIN DESCRIPTION
Note: Please refer to Section 16.2 DC CHARACTERISTICS for details.
I/O
I/O
I/O
I/OD
I/OD
I/OD
OUT
OUT
O 12
OD
OD
IN
IN
IN
IN
IN
4.1
SUSCLKIN
cs
t
td
ts
tsp3
LFRAME#
LRESET#
8t
12t
12tp3
SYMBOL
SERIRQ
LAD[3:0]
12
24
PCICLK
LDRQ#
tp3
CLKIN
12t
16t
24
PME#
2
12
LPC Interface
- TTL level bi-directional pin with 8 mA source-sink capability
- TTL level bi-directional pin with 12 mA source-sink capability
- 3.3V TTL level bi-directional pin with 12 mA source-sink capability
- TTL level bi-directional pin open drain output with 12 mA sink capability
- TTL level bi-directional pin open drain output with 16 mA sink capability
- TTL level bi-directional pin open drain output with 24A sink capability
- Output pin with 2 mA source-sink capability
- Output pin with 12 mA source-sink capability
- 3.3V output pin with 12 mA source-sink capability
- Open-drain output pin with 12 mA sink capability
- Open-drain output pin with 24 mA sink capability
- CMOS level Schmitt-trigger input pin
- TTL level input pin
- TTL level input pin with internal pull down resistor
- TTL level Schmitt-trigger input pin
- 3.3V TTL level Schmitt-trigger input pin
24-27
PIN
18
19
21
22
23
29
30
75
I/O
I/OD
O
IN
IN
IN
OD
IN
I/O
IN
12tp3
12tp3
tsp3
tsp3
tsp3
ts
12
t
12t
System clock input. According to the input frequency 24MHz or
48MHz, it is selectable through register. Default is 24MHz input.
Generated PME event.
PCI clock input.
Encoded DMA Request signal.
Serial IRQ input/Output.
These signal lines communicate address, control, and data
information over the LPC bus between a host and a peripheral.
Indicates start of a new cycle or termination of a broken cycle.
Reset signal. It can connect to PCIRST# signal on the host.
32khz clock input, for CIR only.
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FUNCTION
Publication Release Date: May 31, 2005
W83627SF
Revision A1