W83627SF-AW Winbond, W83627SF-AW Datasheet - Page 89
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W83627SF-AW
Manufacturer Part Number
W83627SF-AW
Description
Manufacturer
Winbond
Datasheet
1.W83627SF-AW.pdf
(116 pages)
Specifications of W83627SF-AW
Pin Count
128
Lead Free Status / RoHS Status
Not Compliant
- Current page: 89 of 116
- Download datasheet (601Kb)
15.2 Logical Device 0 (FDC)
CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR60, CR 61 (Default 0x03, 0xf0 if PNPCSV = 0 during POR, default 0x00, 0x00 otherwise)
CR70 (Default 0x06 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR74 (Default 0x02 if PNPCSV = 0 during POR, default 0x04 otherwise)
CRF0 (Default 0x0E)
FDD Mode Register
These two registers select FDC I/O base address [0x100:0xFF8] on 8 byte boundary.
Bit 7 - 1 : Reserved.
Bit 0
Bit 7 - 4 : Reserved.
Bit 3 - 0 : These bits select IRQ resource for FDC.
Bit 7 - 3 : Reserved.
Bit 2 - 0 : These bits select DRQ resource for FDC.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3 - 2 :Interface Mode
= 1 Activates the logical device.
= 0 Logical device is inactive.
= 0x00 DMA0
= 0x01 DMA1
= 0x02 DMA2
= 0x03 DMA3
= 0x04 - 0x07 No DMA active
: FIPURDWN
This bit controls the internal pull-up resistors of the FDC input pins RDATA, INDEX,
TRAK0, DSKCHG, and WP.
= 0
= 1
: INTVERTZ
This bit determines the polarity of all FDD interface signals.
= 0
= 1
: DRV2EN (PS2 mode only)
When this bit is a logic 0, indicates a second drive is installed and is reflected in status
register A.
: Swap Drive 0, 1 Mode
= 0
= 1
= 11
= 10 (Reserved)
= 01 PS/2
= 00 Model 30
No Swap (Default)
Drive and Motor sel 0 and 1 are swapped.
The internal pull-up resistors of FDC are turned on.(Default)
The internal pull-up resistors of FDC are turned off.
FDD interface signals are active low.
FDD interface signals are active high.
AT Mode (Default)
- 89 -
Publication Release Date: May 31, 2005
W83627SF
Revision A1
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