W83627SF-AW Winbond, W83627SF-AW Datasheet - Page 30

• Manufacturer Part Number: W83627SF-AW
• Manufacturer: Winbond

Specifications of W83627SF-AW

• Pin Count: 128
• Lead Free Status / RoHS Status: Not Compliant

Bit 3: CLKSTPH. This bit determines SCCLK stuck at high or low after CLKSTP is set to 1. SCCLK
Bit 2: CLKSTP. Setting this bit to 1 will stop SCCLK.
Bit 1: SCDIR. This bit determine direction of SCIO pin. SCIO serves as an input port if SCDIR is 1. It
Bit 0: WRST. Writing a 1 to this bit issues a warm reset to IC card. It is self-cleared after writing a 1.
5.10 Baud rate divisor Latch High and Baud rate divisor Latch Low (BHL and BLL
Combining with BASESEL1 and BASESEL0 of ECR, these two bytes of registers provide user all the
possible combinations to cover all the available settings regarding clock rate conversion factor and
baud rate adjustment factor.
BDLAB
BDLAB
BDLAB
Register Address Base
+ 0
= 0
+ 0
= 0
+ 1
= 0
+ 2
+ 2
stays high if CLKSTPH is equal to 1 and stays low otherwise.
is an output port if SCDIR is 0.
at "base address + 1" and "base address + 0" respectively when BDLAB = 1)
Interrupt Control
Interrupt Status
Buffer Register
SMART CARD
(Read Only)
(Read Only)
(Write Only)
(Write Only)
Transmitter
Receiver
Register
Register
Register
Register
Control
Buffer
FIFO
CLKSEL1, CLKSEL0
SCFR
RBR
TBR
ICR
ISR
00
01
10
11
RBR Data
RX Data
TX Data
(ERDRI)
Interrupt
Interrupt
Pending
Enable
Enable
Ready
FIFO
Bit 0
Bit 0
"0" if
Smart Card interface register bit map.
0
(ETBREI)
RX Data
TX Data
Interrupt
Interrupt
Enable
Empty
Status
RCVR
Bit (0)
Reset
FIFO
Bit 1
Bit 1
TBR
1
BIT NUMBER
INTERRU
ENABLE
RX Data
(EUSRI)
Interrupt
TX Data
Status
Bit (1)
Reset
XMIT
FIFO
Bit 2
Bit 2
SSR
-30-
PT
2
Reserved Reserved Reversed
RX Data
TX Data
Interrupt
Status
Bit (2)
Bit 3
Bit 3
3
0
SCCLK FREQUUENCY
(ESCPTI)
SCPSNT
SCPSNT
RX Data
TX Data
interrupt
interrupt
(SCPTI)
Enable
toggle
toggle
status
Bit 4
Bit 4
4
1.5 MHz
12 MHz
3 MHz
6 MHz
line status
RX Data
TX Data
SCPSNT
Bit 5
Bit 5
5
0
W83627SF
RX Data
TX Data
Enabled
Interrupt
FIFOs
Active
(LSB)
Level
Bit 6
Bit 6
RX
**
6
0
RX Data
Interrupt
TX Data
Enabled
FIFOs
(MSB)
Active
Level
Bit 7
Bit 7
RX
**
7
0