W83627SF-AW Winbond, W83627SF-AW Datasheet - Page 26

• Manufacturer Part Number: W83627SF-AW
• Manufacturer: Winbond

Specifications of W83627SF-AW

• Pin Count: 128
• Lead Free Status / RoHS Status: Not Compliant

5.4
This register reflects the Smart Card interface interrupt status, which is encoded by different interrupt
sources into 4 bits.
Bit 7, 6: These two bits are set to a logical 1 when SFR bit 0 = 1.
Bit 5: Reflect value of SCPSNT line status.
Bit 4: Set to 1 if SCPSNT toggles when this type of interrupt is enabled. Bit 0 of this register is also
Bit 3 - 1: These three bits identify the priority level of the pending interrupt, as shown in the table
Bit 0: This bit is a logical 1 if there is no interrupt pending. If one of the interrupt sources has occurred,
BIT
3
0
0
0
1
0
Interrupt Status Register (ISR, read only at "base address + 2")
set to 0 if this type of interrupt occurs.
below.
this bit will be set to a logical 0.
BIT
2
0
1
1
1
0
ISR
BIT
0
1
0
0
1
1
7
BIT
6
1
0
0
0
0
0
5
INTERRUPT
PRIORITY
Second
Second
4
Third
First
-
3
INTERRUPT CONTROL FUNCTION
2
Receive Status
1
INTERRUPT
Smart Card
TBR Empty
FIFO Data
RBR Data
interface
Timeout
0
Ready
TYPE
INTERRUPT SET AND FUNCTION
-
-26-
No interrupt pending
Interrupt status bit 0
Interrupt status bit 0
Interrupt status bit 0
SCPSNT toggle Interrupt (SCPTI)
SCPSNT line status
FIFO enabled
FIFO enabled
1. OER = 1
3. NSER = 1 4. SBD = 1
No Interrupt pending
1. RBR data ready
2. FIFO interrupt active
level reached
Data present in RX
FIFO for 4 characters
period of time since last
access of RX FIFO.
TBR empty
INTERRUPT SOURCE
2. PBER =1
W83627SF
1. Write data into
2. Read ISR (if
1. Read RBR
2. Read RBR
TBR
priority is third)
until FIFO
data under
active level
Read SCSR
INTERRUPT
Read RBR
CLEAR
-