XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 438

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT84L38
OCTAL T1/E1/J1 FRAMER
The table below shows how contents of the Receive Buffer Pointer bit of the Receive Data Link Byte Count
Register (RDLBCR) determines what the next available receive data link buffer number is.
RECEIVE DATA LINK BYTE COUNT REGISTER (RDLBCR) (INDIRECT ADDRESS = 0XN0H, 0X15H)
13.2.4.1.3
The user should read the length of MOS message from the Receive Data Link Byte Count Register. The
receive LAPD Controller increments the Receive Data Link Byte Count Register value when each octet of MOS
message is received. After the Receive End of Transfer (RxEOT) interrupt is generated, the Receive Data Link
Byte Count Register should contain the length of entire MOS message.
The table below shows configurations of the Receive Data Link Byte Count [6:0] bits of the Receive Data Link
Byte Count Register (RDLBCR).
RECEIVE DATA LINK BYTE COUNT REGISTER (RDLBCR) (INDIRECT ADDRESS = 0XN0H, 0X15H)
13.2.4.1.4
Upon detection of the Receive End of Transfer (RxEOT) interrupt, the user should read the Message Type bit
of the Data Link Status Register (DLSR) to find out what is the type of message received.
The table below shows how contents of the Message Type bit of the Data Link Status Register (DLSR)
determines what the type of message received in the data link channel is.
DATA LINK STATUS REGISTER (DLSR) (INDIRECT ADDRESS = 0XNAH, 0X06H)
After determined that the received message is an MOS one, the use should read the entire message from the
available receive data link buffer. The reading of these buffers is through the LAPD Buffer 0 indirect data
registers and the LAPD Buffer1 indirect data registers. LAPD Buffer 0 and 1 indirect data registers have
addresses 0xn6H and 0xn7H respectively. There is no indirect address register for receive data link buffer 0
and 1.
A microcontroller WRITE access to the LAPD Buffer indirect data registers will access the receive data link
buffer and a microcontroller READ will access the receive data link buffers. The very first READ access to the
LAPD Buffer indirect data register will always be direct to location 0 within the receive data link buffer.
For example, if the first octet of the MOS Message received is (10101100) and the next available receive data
link buffer of Channel n is 1. The user should be able to read pattern (01010110) from receive data link buffer 1
of Channel n. The following microprocessor access to the framer should be done:
RD
N
N
N
UMBER
UMBER
UMBER
B
B
6-0
B
7
7
IT
IT
IT
n7H
Receive Data Link
Byte Count [6:0]
Receive Buffer
Message Type
Step 3: Reading the Receive Data Link Byte Count Register
Step 4: Read MOS Message from receive data link buffer
B
B
B
Pointer
IT
IT
IT
N
N
N
AME
AME
AME
B
B
B
RUR /
IT
IT
IT
WC
R
R
T
T
T
YPE
YPE
YPE
0 - The next available receive data link buffer for reading out BOS or MOS
message is Buffer 0.
1 - The next available receive data link buffer for reading out BOS or MOS
message is Buffer 1.
Value of these bits determines how many times a BOS message pattern
will be received by the framer before generating the Receive End of Trans-
fer (TxEOT) interrupt.
0 - Message received in the data link channel is BOS.
1 - Message received in the data link channel is MOS.
418
B
B
B
IT
IT
IT
D
D
D
ESCRIPTION
ESCRIPTION
ESCRIPTION
REV. 1.0.1