XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 300
XRT84L38IB
Manufacturer Part Number
XRT84L38IB
Description
Network Controller & Processor ICs 8 Ch T1/E1 Framer
Manufacturer
Exar Corporation
Datasheet
1.XRT84L38.pdf
(453 pages)
Specifications of XRT84L38IB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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XRT84L38
OCTAL T1/E1/J1 FRAMER
See
Equipment when the Slip Buffer is bypassed and the Recovered Receive Line Clock is timing source of the
Receive section.
The following
RxTSb[4:0]_n) which connecting the Receive Payload Data Output Interface block to the local Terminal
F
ERED RECEIVE LINE CLOCK AS RECEIVE TIMING SOURCE
IGURE
Figure 81
81. I
NTERFACING
Figure 82
for how to connect the Receive Payload Data Output Interface block to the local Terminal
Equipment
Terminal
shows waveforms of the signals (RxSerClk_n, RxSer_n, RxSync_n, RxTSClk_n and
XRT84L38
TO LOCAL TERMINAL EQUIPMENT WITH SLIP BUFFER BYPASSED AND RECOV
RxSerClk_7
RxSer_7
RxMSync_7
RxSync_7
RxTSClk_7
RxTSb[4:0]_7
RxSerClk_0
RxSer_0
RxMSync_0
RxSync_0
RxTSClk_0
RxTSb[4:0]_0
280
Data Input
Data Input
Interface
Interface
Receive
Payload
Receive
Payload
Chn 0
Chn 7
XRT84L38
RxLineClk_0
RxLineClk_7
REV. 1.0.1
-
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