XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 12

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT84L38
OCTAL T1/E1/J1 FRAMER
7.0 DS1 OVERHEAD INTERFACE BLOCK .............................................................................................. 302
8.0 E1 OVERHEAD INTERFACE BLOCK ................................................................................................. 311
T
F
S
S
F
S
E
F
T
F
S
S
F
S
E
T
T
T
T
R
R
R
R
S
T
HIRD
IFTH
OURTH
IRST
HIRD
IFTH
OURTH
RANSMIT
RANSMIT
RANSMIT
RANSMIT
RANSMIT
EVENTH
ECOND
IXTH
IGHTH
EVENTH
ECOND
IXTH
IGHTH
YNCHRONIZATION
7.1 DS1 TRANSMIT OVERHEAD INPUT INTERFACE BLOCK........................................................................... 302
7.2 DS1 RECEIVE OVERHEAD OUTPUT INTERFACE BLOCK ......................................................................... 306
ECEIVE
ECEIVE
ECEIVE
ECEIVE
8.1 E1 TRANSMIT OVERHEAD INPUT INTERFACE BLOCK ............................................................................. 311
F
F
F
F
F
F
F
F
F
F
F
F
F
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
7.1.1 DESCRIPTION OF THE DS1 TRANSMIT OVERHEAD INPUT INTERFACE BLOCK .............................................. 302
7.1.2 CONFIGURE THE DS1 TRANSMIT OVERHEAD INPUT INTERFACE MODULE AS SOURCE OF THE FACILITY DATA
7.1.3 CONFIGURE THE DS1 TRANSMIT OVERHEAD INPUT INTERFACE MODULE AS SOURCE OF THE SIGNALING
7.1.4 CONFIGURE THE DS1 TRANSMIT OVERHEAD INPUT INTERFACE MODULE AS SOURCE OF THE REMOTE SIG-
7.2.1 DESCRIPTION OF THE DS1 RECEIVE OVERHEAD OUTPUT INTERFACE BLOCK ............................................. 306
7.2.2 CONFIGURE THE DS1 RECEIVE OVERHEAD OUTPUT INTERFACE MODULE AS DESTINATION OF THE FACILITY
7.2.3 CONFIGURE THE DS1 RECEIVE OVERHEAD OUTPUT INTERFACE MODULE AS DESTINATION OF THE SIGNALING
7.2.4 CONFIGURE THE DS1 RECEIVE OVERHEAD OUTPUT INTERFACE MODULE AS DESTINATION OF THE REMOTE
8.1.1 DESCRIPTION OF THE E1 TRANSMIT OVERHEAD INPUT INTERFACE BLOCK................................................. 311
8.1.2 CONFIGURE THE E1 TRANSMIT OVERHEAD INPUT INTERFACE MODULE AS SOURCE OF THE NATIONAL BIT SE-
O
O
O
O
O
O
O
CTET OF
O
CTET OF
O
CTET OF
CTET OF
CTET OF
CTET OF
CTET OF
O
O
O
O
D
D
D
D
O
CTET OF
95. I
96. T
O
CTET OF
97. I
98. T
99. B
100. DS1 T
101. DS1 T
102. DS1 T
103. B
104. DS1 R
105. DS1 R
106. DS1 R
107. B
6.2.3.6 E1 R
LINK (FDL) BITS IN ESF FRAMING FORMAT MODE ............................................................................................... 302
FRAMING (FS) BITS IN N OR SLC®96 FRAMING FORMAT MODE......................................................................... 304
NALING (R) BITS IN T1DM FRAMING FORMAT MODE............................................................................................ 304
DATA LINK (FDL) BITS IN ESF FRAMING FORMAT MODE .................................................................................... 306
FRAMING (FS) BITS IN N OR SLC®96 FRAMING FORMAT MODE......................................................................... 308
SIGNALING (R) BITS IN T1DM FRAMING FORMAT MODE ..................................................................................... 309
QUENCE IN E1 FRAMING FORMAT MODE............................................................................................................... 311
CTET OF
CTET OF
D
D
D
D
S
CTET OF
CTET OF
ATA
ATA
ATA
ATA
CTET OF
CTET OF
ATA
ATA
ATA
ATA LINK SELECT REGISTER
IGNALING AND
NTERFACING
NTERFACING
IMING
IMING
LOCK
LOCK
L
L
L
L
LOCK
L
L
L
INK
INK
INK
INK
16.384M
16.384M
16.384M
16.384M
16.384M
16.384M
16.384M
INK
INK
INK
16.384M
16.384M
D
S
S
MUX R
RANSMIT
RANSMIT
RANSMIT
16.384M
16.384M
16.384M
16.384M
ECEIVE
ECEIVE
ECEIVE
D
D
IGNAL WHEN THE FRAMER IS RUNNING AT
IGNAL WHEN THE FRAMER IS RUNNING AT
IAGRAM OF THE
S
S
S
S
16.384M
ECEIVE
16.384M
IAGRAM OF THE
IAGRAM OF THE
S
S
S
ELECT
ELECT
ELECT
ELECT
ELECT
ELECT
ELECT
XRT84L38
XRT84L38
O
O
O
BIT
BIT
BIT
BIT
BIT
BIT
BIT
D
I
O
O
O
EGISTER
VERHEAD
VERHEAD
VERHEAD
NPUT
BIT
BIT
ATA
VERHEAD
VERHEAD
VERHEAD
BIT
BIT
R
R
R
R
BIT
BIT
/
/
/
/
/
/
/
S
BIT
S
BIT
S
S
S
R
R
R
S
S
EGISTER
EGISTER
EGISTER
EGISTER
/
/
S
S
/
/
D
/
D
D
/
EGISTER
EGISTER
EGISTER
D
I
D
D
D
S
S
S
NTERFACE
S
L
/
/
DS1 T
ATA
S
TO LOCAL TERMINAL EQUIPMENT USING
ATA
S
TO LOCAL TERMINAL EQUIPMENT USING
ATA
D
ATA
ATA
D
ATA
ATA
INK
DS1 R
E1 T
D
D
D
D
O
O
O
ATA
ATA
D
D
ATA
ATA
(SMR) (I
I
I
I
ATA
ATA
UTPUT
UTPUT
UTPUT
NPUT
NPUT
NPUT
ATA
ATA
S
S
S
S
S
S
RANSMIT
S
S
RANSMIT
TREAM
TREAM
ELECT
TREAM
(TDLSR) (I
(TDLSR) (I
(TDLSR) (I
(RDLSR) (I
TREAM
S
TREAM
S
ECEIVE
TREAM
TREAM
(
S
S
S
S
TDLSR
(TDLSR) (I
(TDLSR) (I
(TDLSR) (I
TREAM
TREAM
S
- H.100 16.384M
S
I
T
I
NTERFACE
NTERFACE MODULE IN
TREAM
TREAM
TREAM
TREAM
I
I
I
IMING IN
NTERFACE MODULE IN
NTERFACE
NTERFACE
TREAM
TREAM
O
NDIRECT
O
O
R
.......................................................................................... 296
.......................................................................................... 296
.......................................................................................... 297
.......................................................................................... 299
.......................................................................................... 299
.......................................................................................... 299
.......................................................................................... 300
) (I
VERHEAD
VERHEAD
VERHEAD
EGISTER
....................................................................................... 297
....................................................................................... 300
...................................................................................... 297
...................................................................................... 297
...................................................................................... 300
...................................................................................... 300
N
..................................................................................... 296
..................................................................................... 299
NDIRECT ADDRESS
T
NDIRECT
NDIRECT
OR
T
T
IMING IN
NDIRECT
NDIRECT
NDIRECT
NDIRECT
NDIRECT
IMING IN
IMING IN
HMVIP 16.384M
H.100 16.384M
VIII
SLC®96 F
A
I
I
O
NPUT
BIT
NPUT
DDRESS
UTPUT
(TSDLSR) (I
/
S
ESF F
......................................................................................... 298
T1DM F
N
T1DM F
I
A
A
I
ESF
NTERFACE OF
A
NTERFACE OF THE
A
A
A
A
OR
DDRESS
DDRESS
I
DDRESS
DDRESS
NTERFACE OF
DDRESS
DDRESS
DDRESS
RAMING
RAMING
SLC®96 F
16.384M
16.384M
FRAMING FORMAT MODE
= 0
BIT
RAMING
RAMING
BIT
XN
/
S MODE
/
= 0
F
S MODE
NDIRECT
= 0
= 0
F
ORMAT
0H, 0
= 0
= 0
= 0
= 0
= 0
ORMAT MODE
XRT84L38 ................................................ 311
BIT
BIT
XN
F
F
RAMING
XN
XN
XRT84L38............................................ 306
ORMAT MODE
ORMAT MODE
XN
/
/
XN
XN
XN
XN
S DATA BUS
S DATA BUS
........................................................... 301
0H, 0
XRT84L38 ........................................ 302
0H, 0
0H, 0
......................................................... 298
X
M
0H, 0
0H, 0
0H, 0
0H, 0
0H, 0
09H) .................................. 312
ODE
A
F
DDRESS
ORMAT MODE
X
X
X
.............................................. 304
0AH) ........................... 305
X
............................................. 303
X
0AH).......................... 307
0AH).......................... 307
X
X
X
........................................... 308
0AH)......................... 308
0AH) ........................ 309
0AH)........................ 303
0AH)........................ 303
0AH)........................ 304
......................................... 298
......................................... 301
......................................... 310
........................................ 305
= 0
............................ 309
XN
0H, 0
X
0AH) 312
REV. 1.0.1