XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 149

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
B
IT
N
1-0
UMBER
2
Robbed-bit Signaling
Enable
Transmit Signaling
Source Select
B
IT
N
AME
B
IT
R/W
R/W
T
YPE
Robbed-bit Signaling Enable:
When these bits are set to 0:
Robbed-bit Signaling is disabled. No signaling data will be
inserted into the input PCM data no matter what the setting of
the Transmit Signaling Source Select [1:0] bits is.
When these bits are set to 1:
Signaling data is enabled and inserted into the input DS1 PCM
data according to setting of the Transmit Signaling Source Select
[1:0] bits.
Transmit Signaling Source Select:
When these bits are set to 00:
None of the signaling data, the CAS Multi-frame alignment pat-
tern, the X bit or the CAS Multi-frame Yellow Alarm bit Y is
inserted into the outgoing E1 PCM data by the framer. However,
the user can embed the signaling data, the CAS Multi-frame
alignment pattern, the X bit or the CAS Multi-frame Yellow Alarm
bit Y into E1 PCM data before routing the PCM data into the
framer.
When these bits are set to 01:
The signaling data, the CAS Multi-frame alignment pattern, the X
bit or the CAS Multi-frame Yellow Alarm bit Y is inserted into the
outgoing E1 PCM data from TSCR register of each timeslot.
When these bits are set to 10:
If the XRT84L38 framer is operating in E1 2.048Mbit/s mode and
if the TxFR2048 bit of the Transmit Interface Control Register
(TICR) is set to zero:
The signaling data, the CAS Multi-frame alignment pattern, the X
bit or the CAS Multi-frame Yellow Alarm bit Y is inserted into the
outgoing E1 PCM data from the TxOH_n input pin.
If the XRT84L38 framer is operating in E1 2.048Mbit/s mode and
if the TxFR2048 bit of the Transmit Interface Control Register
(TICR) is set to one:
The signaling data, the CAS Multi-frame alignment pattern, the X
bit or the CAS Multi-frame Yellow Alarm bit Y is inserted into the
outgoing E1 PCM data from the TxSig_n input pin.
When these bits are set to 11:
No signaling data or the CAS Multi-frame alignment pattern is
inserted into the input E1 PCM data by the framer. However, the
user can embed signaling data into E1 PCM data before routing
the PCM data into the framer.
The X bit is inserted into the outgoing E1 PCM data from TSCR
register.
The CAS Multi-frame Yellow Alarm Y bit is generated by the
XRT84L38 framer depends on operating condition of the E1 link.
129
B
IT
D
ESCRIPTION
OCTAL T1/E1/J1 FRAMER
XRT84L38