CYRF69213-40LFXC Cypress Semiconductor Corp, CYRF69213-40LFXC Datasheet - Page 46

• Manufacturer Part Number: CYRF69213-40LFXC
• Description: IC PROC 8K FLASH 40VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CYRFr
• Type: Transceiverr

Specifications of CYRF69213-40LFXC

• Package / Case: 40-VQFN Exposed Pad, 40-HVQFN, 40-SQFN, 40-DHVQFN
• Frequency: 2.4GHz
• Data Rate - Maximum: 1Mbps
• Modulation Or Protocol: ISM
• Applications: General Purpose
• Power - Output: 4dBm
• Sensitivity: -97dBm
• Voltage - Supply: 4 V ~ 5.5 V
• Current - Receiving: 23.4mA
• Current - Transmitting: 36.6mA
• Data Interface: PCB, Surface Mount
• Memory Size: 8kB Flash, 256B SRAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Operating Frequency: 2497 MHz
• Operating Supply Voltage: 2.5 V or 3.3 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCU
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-1934

Table 62. SPI SCLK Frequency
Timer Registers
All timer functions of the CYRF69213 are provided by a single
timer block. The timer block is asynchronous from the CPU clock.
Table 63. Free-Running Timer Low Order Byte (FRTMRL) [0x20] [R/W]
Table 64. Free-Running Timer High Order Byte (FRTMRH) [0x21] [R/W]
Document #: 001-07552 Rev. *D
00
01
10
11
Bit #
Field
Read/Write
Default
Bits 7:0
This register holds the low order byte of the 16-bit free-running timer. Reading this register causes the high order byte to be
moved into a holding register allowing an automatic read of all 16 bits simultaneously.
For reads, the actual read occurs in the cycle when the low order is read. For writes, the actual time the write occurs is the cycle
when the high order is written
When reading the free-running timer, the low order byte should be read first and the high order second. When writing, the low
order byte should be written first then the high order byte
Bit #
Field
Read/Write
Default
Bits 7:0
When reading the free-running timer, the low order byte should be read first and the high order second. When writing, the low
order byte should be written first then the high order byte
SCLK
Select
6
12
48
96
CPUCLK
Divisor
Free-running Timer [7:0]
Free-running Timer [15:8]
R/W
R/W
7
0
7
0
2 MHz
1 MHz
250 KHz
125 KHz
SCLK Frequency when CPUCLK =
12 MHz
R/W
R/W
Tim er C apture
6
0
6
0
Figure 16. 16-Bit Free-Running Counter Block Diagram
C lock
4 MHz
2 MHz
500 KHz
250 KHz
24 MHz
R/W
R/W
5
0
5
0
R unning C ounter
16-bit F ree
Free-running Timer [15:8]
Free-running Timer [7:0]
R/W
R/W
4
0
4
0
Registers
Free-Running Counter
The 16-bit free-running counter is clocked by a 4/6 MHz source.
It can be read in software for use as a general purpose time base.
When the low order byte is read, the high order byte is registered.
Reading the high order byte reads this register allowing the CPU
to read the 16-bit value atomically (loads all bits at one time). The
free-running timer generates an interrupt at a 1024 μ s rate. It can
also generate an interrupt when the free-running counter
overflow occurs—every 16.384 ms. This allows extending the
length of the timer in software.
R/W
R/W
3
0
3
0
O verflow
Interrupt
Interrupt
1024-µs
T im er
R/W
R/W
2
0
2
0
R/W
R/W
1
0
1
0
CYRF69213
Page 46 of 77
R/W
R/W
0
0
0
0
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