CYRF69213-40LFXC Cypress Semiconductor Corp, CYRF69213-40LFXC Datasheet - Page 18

• Manufacturer Part Number: CYRF69213-40LFXC
• Description: IC PROC 8K FLASH 40VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CYRFr
• Type: Transceiverr

Specifications of CYRF69213-40LFXC

• Package / Case: 40-VQFN Exposed Pad, 40-HVQFN, 40-SQFN, 40-DHVQFN
• Frequency: 2.4GHz
• Data Rate - Maximum: 1Mbps
• Modulation Or Protocol: ISM
• Applications: General Purpose
• Power - Output: 4dBm
• Sensitivity: -97dBm
• Voltage - Supply: 4 V ~ 5.5 V
• Current - Receiving: 23.4mA
• Current - Transmitting: 36.6mA
• Data Interface: PCB, Surface Mount
• Memory Size: 8kB Flash, 256B SRAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Operating Frequency: 2497 MHz
• Operating Supply Voltage: 2.5 V or 3.3 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCU
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-1934

Data Memory Organization
The MCU function has 256 bytes of data RAM
Flash
This section describes the Flash block of the CYRF69213. Much
of the user-visible Flash functionality, including programming
and security, are implemented in the M8C Supervisory Read
Only Memory (SROM). CYRF69213 Flash has an endurance of
1000 cycles and 10 year data retention.
Flash Programming and Security
All Flash programming is performed by code in the SROM. The
registers that control the Flash programming are only visible to
the M8C CPU when it is executing out of SROM. This makes it
impossible to read, write, or erase the Flash by bypassing the
security mechanisms implemented in the SROM.
Customer firmware can only program the Flash via SROM calls.
The data or code images can be sourced by way of any interface
with the appropriate support firmware. This type of programming
requires a ‘boot-loader’—a piece of firmware resident on the
Flash. For safety reasons this boot-loader should not be
overwritten during firmware rewrites.
The Flash provides four auxiliary rows that are used to hold Flash
block protection flags, boot time calibration values, configuration
tables, and any device values. The routines for accessing these
auxiliary rows are documented in the SROM section. The
auxiliary rows are not affected by the device erase function.
In-System Programming
Most designs that include an CYRF69213 part have a USB
connector attached to the USB D+/D– pins on the device. These
designs require the ability to program or reprogram a part
through these two pins alone.
CYRF69213 device enables this type of in-system programming
by using the D+ and D– pins as the serial programming mode
interface. This allows an external controller to cause the
CYRF69213 part to enter serial programming mode and then to
use the test queue to issue Flash access functions in the SROM.
The programming protocol is not USB.
Document #: 001-07552 Rev. *D
Top of RAM Memory
after reset
8-bit PSP
Figure 7. Data Memory Organization
Address
0xFF
0x00
Stack begins here and grows upward.
SROM
The SROM holds code that is used to boot the part, calibrate
circuitry, and perform Flash operations.
functions.) The functions of the SROM may be accessed in
normal user code or operating from Flash. The SROM exists in
a separate memory space from user code. The SROM functions
are accessed by executing the Supervisory System Call
instruction (SSC), which has an opcode of 00h. Prior to
executing the SSC, the M8C’s accumulator needs to be loaded
with the desired SROM function code from
functions causes a HALT if called from user code. The SROM
functions are executing code with calls; therefore, the functions
require stack space. With the exception of Reset, all of the
SROM functions have a parameter block in SRAM that must be
configured before executing the SSC.
parameter block variables. The meaning of each parameter, with
regards to a specific SROM function, is described later in this
section.
Table 23. SROM Function Codes
Two important variables that are used for all functions are KEY1
and KEY2. These variables are used to help discriminate
between valid SSCs and inadvertent SSCs. KEY1 must always
have a value of 3Ah, while KEY2 must have the same value as
the stack pointer when the SROM function begins execution.
This would be the Stack Pointer value when the SSC opcode is
executed, plus three. If either of the keys do not match the
Function Code
00h
01h
02h
03h
05h
06h
07h
Function Name
SWBootReset
EraseBlock
ReadBlock
CheckSum
WriteBlock
TableRead
EraseAll
Table 24
(Table 23
Table
CYRF69213
Stack Space
lists all possible
lists the SROM
23. Undefined
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