HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 958

MPU 1.5/3.3V 0K I-TEMP PB-FREE 2

HD6417750RF200DV

Manufacturer Part Number
HD6417750RF200DV
Description
MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF200DV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.35 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF200DV
Manufacturer:
FREESCALE
Quantity:
450
Section 20 User Break Controller (UBC)
20.4
The user break debug support function enables the processing used in the event of a user break
exception to be changed. When a user break exception occurs, if the UBDE bit is set to 1 in the
BRCR register, the DBR register value will be used as the branch destination address instead of
[VBR + offset]. The value of R15 is saved in the SGR register regardless of the value of the
UBDE bit in the BRCR register or the kind of exception event. A flowchart of the user break
debug support function is shown in figure 20.2.
Rev.7.00 Oct. 10, 2008 Page 872 of 1074
REJ09B0366-0700
execution break is suppressed in accordance with the priorities of the two events. For example,
in the case of contention between a TRAPA instruction and a post-execution break, the user
break is suppressed. However, in this case, the CMF bit is set by the occurrence of the break
condition.
User Break Debug Support Function

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