HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 756

• Manufacturer Part Number: HD6417750RF200DV
• Description: MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF200DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 15 Serial Communication Interface (SCI)
Bit 3—Parity Error (PER): Indicates that a parity error occurred during reception with parity
addition in asynchronous mode, causing abnormal termination.
Bit 3: PER
0
1
Notes: 1. The PER flag is not affected and retains its previous state when the RE bit in SCSCR1
Bit 2—Transmit End (TEND): Indicates that there is no valid data in SCTDR1 when the last bit
of the transmit character is sent, and transmission has been ended.
The TEND flag is read-only and cannot be modified.
Bit 2: TEND
0
1
Bit 1—Multiprocessor Bit (MPB)*: This bit is read-only and cannot be written to. The read
value is undefined.
Rev.7.00 Oct. 10, 2008 Page 670 of 1074
REJ09B0366-0700
2. If a parity error occurs, the receive data is transferred to SCRDR1 but the RDRF flag is
is cleared to 0.
not set. Serial reception cannot be continued while the PER flag is set to 1.
Description
Reception in progress, or reception has ended normally *
[Clearing conditions]
•
•
A parity error occurred during reception *
[Setting condition]
When, in reception, the number of 1-bits in the receive data plus the parity
bit does not match the parity setting (even or odd) specified by the O/E bit in
SCSMR1
Description
Transmission is in progress
[Clearing conditions]
•
•
Transmission has been ended
[Setting conditions]
•
•
•
Power-on reset, manual reset, standby mode, or module standby
When 0 is written to PER after reading PER = 1
When 0 is written to TDRE after reading TDRE = 1
When data is written to SCTDR1 by the DMAC
Power-on reset, manual reset, standby mode, or module standby
When the TE bit in SCSCR1 is 0
When TDRE = 1 on transmission of the last bit of a 1-byte serial transmit
character
2
1
(Initial value)
(Initial value)