HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 279

• Manufacturer Part Number: HD6417750RF200DV
• Description: MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF200DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

6.4
In a floating-point instruction, rounding is performed when generating the final operation result
from the intermediate result. Therefore, the result of combination instructions such as FMAC,
FTRV, and FIPR will differ from the result when using a basic instruction such as FADD, FSUB,
or FMUL. Rounding is performed once in FMAC, but twice in FADD, FSUB, and FMUL.
There are two rounding methods, the method to be used being determined by the RM field in
FPSCR.
• RM = 00: Round to Nearest
• RM = 01: Round to Zero
Round to Nearest: The value is rounded to the nearest expressible value. If there are two nearest
expressible values, the one with an LSB of 0 is selected.
If the unrounded value is 2
unrounded value. The values of Emax and P, respectively, are 127 and 24 for single-precision, and
1023 and 53 for double-precision.
Round to Zero: The digits below the round bit of the unrounded value are discarded.
If the unrounded value is larger than the maximum expressible absolute value, the value will be
the maximum expressible absolute value.
6.5
FPU-related exceptions are as follows:
• General illegal instruction/slot illegal instruction exception
• FPU exceptions
The exception occurs if an FPU instruction is executed when SR.FD = 1.
The exception sources are as follows:
⎯ FPU error (E): When FPSCR.DN = 0 and a denormalized number is input
⎯ Invalid operation (V): In case of an invalid operation, such as NaN input
⎯ Division by zero (Z): Division with a zero divisor
⎯ Overflow (O): When the operation result overflows
⎯ Underflow (U): When the operation result underflows
⎯ Inexact exception (I): When overflow, underflow, or rounding occurs
Rounding
Floating-Point Exceptions
Emax
(2 – 2
–P
) or more, the result will be infinity with the same sign as the
Rev.7.00 Oct. 10, 2008 Page 193 of 1074
Section 6 Floating-Point Unit (FPU)
REJ09B0366-0700