HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 493

• Manufacturer Part Number: HD6417750RF200DV
• Description: MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF200DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

• For Synchronous DRAM Interface:
AMX
0
1
2
3
4
5
6
7
Notes: 1. a[*]: Not an address pin but an external address
2. Can only be set in the SH7750R.
3. Can only be set in the SH7750S/SH7750R (Setting prohibited in the SH7750).
4. For details on address multiplexing, refer to appendix F, Synchronous DRAM Address
Multiplexing Tables.
AMXEXT
0
1
0
1
—
—
—
—
0
1
0
1
—
SZ
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
64
32
32
64
32
Example of Synchronous DRAM
(16M: 512K × 16 bits × 2) × 4
(16M: 512K × 16 bits × 2) × 2
(16M: 512K × 16 bits × 2) × 4
(16M: 512K × 16 bits × 2) × 2
(16M: 1M × 8 bits × 2) × 8
(16M: 1M × 8 bits × 2) × 4
(16M: 1M × 8 bits × 2) × 8
(16M: 1M × 8 bits × 2) × 4
(64M: 1M × 16 bits × 4) × 4
(64M: 1M × 16 bits × 4) × 2
(64M: 2M × 8 bits × 4) × 8
(64M: 2M × 8 bits × 4) × 4
(64M: 512K × 32 bits × 4) × 2
(64M: 512K × 32 bits × 4) × 1
(64M: 1M × 32 bits × 2) × 2
(64M: 1M × 32 bits × 2) × 1
(128M: 4M × 8 bits × 4) × 8 *
(256M: 4M × 16 bits × 4) × 4 *
(128M: 4M × 8 bits × 4) × 4 *
(256M: 4M × 16 bits × 4) × 2 *
(16M: 256K × 32 bits × 2) × 2
(16M: 256K × 32 bits × 2) × 1
Rev.7.00 Oct. 10, 2008 Page 407 of 1074
Section 13 Bus State Controller (BSC)
2
3
2
3
REJ09B0366-0700
BANK *
a[22] *
a[21] *
a[21] *
a[20] *
a[23] *
a[22] *
a[22] *
a[21] *
a[24:23] *
a[23:22] *
a[25:24] *
a[24:23] *
a[23:22] *
a[22:21] *
a[23] *
a[22] *
a[26:25] *
a[26:25] *
a[25:24] *
a[25:24] *
a[21] *
a[20] *
1
1
1
1
1
1
1
1
1
1
1
1
4
1
1
1
1
1
1
1
1
1
1