HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 351

MPU 1.5/3.3V 0K I-TEMP PB-FREE 2

HD6417750RF200DV

Manufacturer Part Number
HD6417750RF200DV
Description
MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF200DV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.35 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF200DV
Manufacturer:
FREESCALE
Quantity:
450
9.2.3
When bit 5 in the standby control register (STBCR) is cleared to 0, peripheral module related pins
are pulled up when in the input or high-impedance state.
• Relevant Pins
SCI related pins
DMA related pins
TMU related pin
• Other Information
9.2.4
Standby control register 2 (STBCR2) is an 8-bit readable/writable register that specifies the sleep
mode and deep sleep mode transition conditions. It is initialized to H'00 by a power-on reset via
the RESET pin or due to watchdog timer overflow.
Note:
The setting in this register is invalid in the hardware standby mode.
For details of pin states, see Appendix E, Pin Functions.
Initial value:
*
Peripheral Module Pin Pull-Up Control
Standby Control Register 2 (STBCR2)
Reserved bit in the SH7750.
R/W:
Bit:
DSLP
R/W
7
0
MD7/TXD
RXD
DREQ0
DREQ1
TCLK
MD0/SCK
STHZ
R/W
6
0
R
5
0
MD1/TXD2
MD8/RTS2
CTS2
DACK0
DACK1
R
4
0
Rev.7.00 Oct. 10, 2008 Page 265 of 1074
R
3
0
Section 9 Power-Down Modes
R
2
0
MD2/RXD2
SCK2/MRESET
DRAK0
DRAK1
MSTP6 * MSTP5 *
REJ09B0366-0700
R/W
1
0
R/W
0
0

Related parts for HD6417750RF200DV