HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 560

• Manufacturer Part Number: HD6417750RF200DV
• Description: MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF200DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 13 Bus State Controller (BSC)
interval. The number of Trwl cycles can be specified by bits TRWL2–TRWL0 in MCR. DACK is
asserted two cycles before the data write cycle.
As this LSI supports burst read/burst write operations for synchronous DRAM, there are empty
cycles in a single write operation.
Rev.7.00 Oct. 10, 2008 Page 474 of 1074
REJ09B0366-0700
CKIO
Bank
Precharge-sel
Address
CSn
RD/WR
RAS
CASS
DQMn
D63–D0
(read)
BS
CKE
DACKn
(SA: IO → memory)
Note: For DACKn, an example is shown where CHCRn.AL (access level) = 0 for the DMAC.
Figure 13.31 Basic Timing for Synchronous DRAM Single Write
Tr
Row
Row
Row
Trw
Tc1
c1
Tc2
H/L
c1
Tc3
Tc4
Trwl
Trwl
Tpc