HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 16

MPU 1.5/3.3V 0K I-TEMP PB-FREE 2

HD6417750RF200DV

Manufacturer Part Number
HD6417750RF200DV
Description
MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF200DV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.35 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF200DV
Manufacturer:
FREESCALE
Quantity:
450
Rev.7.00 Oct. 10, 2008 Page xiv of lxxxiv
REJ09B0366-0700
Item
7.3 Instruction Set
Table 7.12 Floating-
Point Graphics
Acceleration Instructions
7.4 Usage Notes
8.4 Usage Notes
9.1.1 Types of Power-
Down Modes
9.2.4 Standby Control
Register 2 (STBCR2)
9.5.2 Exit from Standby
Mode
9.7.1 Transition to
Hardware Standby
Mode
Page
227
227 to
229
258
259
266
271
274
Revision (See Manual for Details)
Table amended
Newly added
Newly added
Description amended
Description amended
Bit 6
selects whether the STATUS0 and STATUS1 pins are set to
high-impedance when in hardware standby mode.
Bit 6: STHZ
0
1
Notes amended
Notes: 1. Only when the RTC clock (32.768 kHz) is operating
Description amended
3. On the SH7750S, the RTC continues to operate even when
Instruction
FRCHG
FSCHG
no power is supplied to power pins other than the RTC power
supply pin.
The state of the STATUS pin reflects the setting of the STHZ
bit. Refer to appendix E, Pin Functions, for details on output
pin states.
Module standby function (TMU, RTC, SCI/SCIF, DMAC,
SQ*, and UBC* )
—STATUS Pin High-Impedance Control (STHZ): This bit
2. GPIO can be used to cancel standby mode when the
(see section 19.2.2, IRL Interrupts), standby mode
can be exited by means of IRL3–IRL0 (when the
IRL3–IRL0 level is higher than the SR register IMASK
mask level).
RTC clock (32.768 kHz) is operating (when the GPIO
level is higher than the SR register IMASK mask
level).
Description
Sets STATUS0, 1 pins to high-impedance when in hardware standby mode
Drives STATUS0, 1 pins to LH when in hardware standby mode
Operation
~FPSCR.FR → FPSCR.FR
~FPSCR.SZ → FPSCR.SZ
(Initial value)

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