HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 82

MPU 1.5/3.3V 0K I-TEMP PB-FREE 2

HD6417750RF200DV

Manufacturer Part Number
HD6417750RF200DV
Description
MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF200DV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.35 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF200DV
Manufacturer:
FREESCALE
Quantity:
450
Table 14.16 Function of BAVL ................................................................................................. 648
Table 14.17 DTR Format for Clearing Request Queues ............................................................ 649
Table 14.18 DMAC Interrupt-Request Codes............................................................................ 650
Section 15 Serial Communication Interface (SCI)
Table 15.1
Table 15.2
Table 15.3
Table 15.4
Table 15.5
Table 15.6
Table 15.7
Table 15.8
Table 15.9
Table 15.10 Serial Transfer Formats (Asynchronous Mode) ..................................................... 688
Table 15.11 Receive Error Conditions ....................................................................................... 696
Table 15.12 SCI Interrupt Sources ............................................................................................. 718
Table 15.13 SCSSR1 Status Flags and Transfer of Receive Data.............................................. 719
Table 15.14 Peripheral Module Signal Timing .......................................................................... 724
Section 16 Serial Communication Interface with FIFO (SCIF)
Table 16.1
Table 16.2
Table 16.3
Table 16.4
Table 16.5
Table 16.6
Section 17 Smart Card Interface
Table 17.1
Table 17.2
Table 17.3
Table 17.4
Table 17.5
Table 17.6
Table 17.7
Table 17.8
Table 17.9
Rev.7.00 Oct. 10, 2008 Page lxxx of lxxxiv
REJ09B0366-0700
SCI Pins.................................................................................................................. 658
SCI Registers.......................................................................................................... 659
Examples of Bit Rates and SCBRR1 Settings in Asynchronous Mode ................. 677
Examples of Bit Rates and SCBRR1 Settings in Synchronous Mode.................... 681
Maximum Bit Rate for Various Frequencies with Baud Rate Generator
(Asynchronous Mode)............................................................................................ 682
Maximum Bit Rate with External Clock Input (Asynchronous Mode).................. 683
Maximum Bit Rate with External Clock Input (Synchronous Mode) .................... 683
SCSMR1 Settings for Serial Transfer Format Selection ........................................ 685
SCSMR1 and SCSCR1 Settings for SCI Clock Source Selection.......................... 686
SCIF Pins ............................................................................................................... 728
SCIF Registers ....................................................................................................... 729
SCSMR2 Settings for Serial Transfer Format Selection ........................................ 758
SCSCR2 Settings for SCIF Clock Source Selection .............................................. 758
Serial Transmit/Receive Formats ........................................................................... 759
SCIF Interrupt Sources........................................................................................... 770
Smart Card Interface Pins ...................................................................................... 777
Smart Card Interface Registers............................................................................... 777
Smart Card Interface Register Settings .................................................................. 785
Values of n and Corresponding CKS1 and CKS0 Settings .................................... 788
Examples of Bit Rate B (bits/s) for Various SCBRR1 Settings (When n = 0)....... 788
Examples of SCBRR1 Settings for Bit Rate B (bits/s) (When n = 0) .................... 788
Maximum Bit Rate at Various Frequencies (Smart Card Interface Mode) ............ 789
Register Settings and SCK Pin State ...................................................................... 789
Smart Card Mode Operating States and Interrupt Sources..................................... 796

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