HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 243

MPU 1.5/3.3V 0K I-TEMP PB-FREE 2

HD6417750RF200DV

Manufacturer Part Number
HD6417750RF200DV
Description
MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF200DV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.35 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF200DV
Manufacturer:
FREESCALE
Quantity:
450
Pipeline flow:
Order of detection:
Order of exception handling:
Instruction n
Instruction n+1
Instruction n+2
Instruction n+3
General illegal instruction exception (instruction n+1) and
TLB miss (instruction n+2) are detected simultaneously
TLB miss (instruction n)
TLB miss (instruction n)
Re-execution of instruction n
General illegal instruction exception
(instruction n+1)
Re-execution of instruction n+1
TLB miss (instruction n+2)
Re-execution of instruction n+2
Execution of instruction n+3
Figure 5.3 Example of General Exception Acceptance Order
IF
IF
ID
ID
IF
TLB miss (instruction access)
General illegal instruction exception
EX
EX
ID
IF
MA
MA
EX
ID
TLB miss (data access)
Program order
WB
WB
MA
EX
1
2
3
4
Rev.7.00 Oct. 10, 2008 Page 157 of 1074
WB
MA
WB
Legend:
ID: Instruction decode
EX: Instruction execution
MA: Memory access
WB: Write-back
IF: Instruction fetch
Section 5 Exceptions
REJ09B0366-0700

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