DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 506

• Manufacturer Part Number: DF2268FA13V
• Description: IC H8S/2268 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2268FA13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 15 A/D Converter
15.5.3
The A/D converter has a built-in sample-and-hold circuit. The A/D converter samples the analog
input when the A/D conversion start delay time (t
starts conversion. Figure 15.5 shows the A/D conversion timing. Table 15.3 shows the A/D
conversion time.
As indicated in figure 15.5, the A/D conversion time (t
(t
conversion time therefore varies within the ranges indicated in table 15.3.
Specify the conversion time by setting bits CKS0 and CKS1 in ADCR with ADST cleared to 0.
Note that the specified conversion time should be longer than the value described in A/D
Conversion Characteristics in section 25, Electrical Characteristics.
In scan mode, the values given in table 15.3 apply to the first conversion time. The values given in
table 15.4 apply to the second and subsequent conversions.
Rev. 5.00 Sep. 01, 2009 Page 454 of 656
REJ09B0071-0500
SPL
). The length of t
Input Sampling and A/D Conversion Time
D
Address
Write signal
Input sampling
timing
ADF
φ
Legend:
(1):
(2):
t
t
t
D
SPL
CONV
varies depending on the timing of the write access to ADCSR. The total
:
:
: A/D conversion time
ADCSR write cycle
ADCSR address
A/D conversion start delay
Input sampling time
Figure 15.5 A/D Conversion Timing
(1)
(2)
t
D
t
SPL
D
) has passed after the ADST bit is set to 1, then
t
CONV
CONV
) includes t
D
and the input sampling time