DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 222

• Manufacturer Part Number: DF2268FA13V
• Description: IC H8S/2268 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2268FA13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 9 I/O Ports
9.8.1
PJDDR specifies input or output the port J pins using the individual bits. PJDDR cannot be read; if
it is, an undefined value will be read.
The value of this register when read is undefined after a bit manipulation instruction is executed.
To prevent undefined read values, do not use bit manipulation instructions to write to this register.
For details, see section 2.9.4, Access Methods for Registers with Write-Only Bits.
9.8.2
PJDR stores output data for port J pins.
Rev. 5.00 Sep. 01, 2009 Page 170 of 656
REJ09B0071-0500
7
7
Bit
6
5
4
3
2
1
0
Bit
6
5
4
3
2
1
0
Bit Name
PJ7DDR
PJ6DDR
PJ5DDR
PJ4DDR
PJ3DDR
PJ2DDR
PJ1DDR
PJ0DDR
Bit Name
PJ7DR
PJ6DR
PJ5DR
PJ4DR
PJ3DR
PJ2DR
PJ1DR
PJ0DR
Port J Data Direction Register (PJDDR)
Port J Data Register (PJDR)
Initial
Value
0
0
0
0
0
0
0
0
Initial
Value
0
0
0
0
0
0
0
0
R/W
W
W
W
W
W
W
W
W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
When a pin is specified as a general purpose I/O port,
setting this bit to 1 makes the corresponding port J pin an
output pin. Clearing this bit to 0 makes the pin an input
pin.
Description
Output data for a pin is stored when the pin is specified
as a general purpose output port.