DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 174

• Manufacturer Part Number: DF2268FA13V
• Description: IC H8S/2268 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2268FA13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 8 Data Transfer Controller (DTC)
8.3
The DTC operates when activated by an interrupt or by a write to DTVECR by software. An
interrupt request can be directed to the CPU or DTC, as designated by the corresponding DTCER
bit. At the end of a data transfer (or the last consecutive transfer in the case of chain transfer), the
activation source or corresponding DTCER bit is cleared. Table 8.1 shows the relationship
between the activation source and DTCER clearing. The activation source flag, in the case of
RXI0, for example, is the RDRF flag in SCI_0.
Since there are a number of DTC activation sources, transferring the last byte (or word) does not
clear the flag of its activation source. Take appropriate steps at each interrupt processing.
When an interrupt has been designated a DTC activation source, the existing CPU mask level and
interrupt controller priorities have no effect. If there is more than one activation source at the same
time, the DTC operates in accordance with the default priorities.
Table 8.1
Figure 8.2 shows a block diagram of activation source control. For details, see section 5, Interrupt
Controller.
Rev. 5.00 Sep. 01, 2009 Page 122 of 656
REJ09B0071-0500
Activation Source
Software activation
Interrupt activation
Activation Sources
Activation Source and DTCER Clearing
The DISEL Bit Is 0, and Transfer
Counts Specified have not Ended
•
•
•
The SWDTE bit is cleared to 0
The corresponding DTCER bit
retains 1
The activation source flag is
cleared to 0
The DISEL Bit Is 1, or Transfer
Counts Specified have Ended
•
•
•
•
•
The SWDTE bit retains 1
The interrupt request is sent to
the CPU
The corresponding DTCER bit is
cleared to 0
The activation source flag
retains 1
The interrupt request which
becomes an activation source is
sent to the CPU