DF2268FA13V Renesas Electronics America, DF2268FA13V Datasheet - Page 505

• Manufacturer Part Number: DF2268FA13V
• Description: IC H8S/2268 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2268FA13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.5.2
In scan mode, A/D conversion is to be performed sequentially on the specified channels (four
channels maximum). The operations are as follows.
1. When the ADST bit is set to 1 by software, TPU, timer conversion start trigger, or external
2. When A/D conversion for each channel is completed, the result is sequentially transferred to
3. When conversion of all the selected channels is completed, the ADF flag is set to 1. If the
4. Steps [2] to [3] are repeated as long as the ADST bit remains set to 1. When the ADST bit is
State of channel 3
State of channel 2
State of channel 0
State of channel 1
trigger, input, A/D conversion starts on the first channel in the group (AN0 when CH3 and
CH2 = 00, AN4 when CH3 and CH2 = 01, or AN8 when CH3 and CH2 = 10).
the A/D data register corresponding to each channel.
ADIE bit is set to 1 at this time, an ADI interrupt is requested after A/D conversion ends.
Conversion of the first channel in the group starts again.
cleared to 0, A/D conversion stops and the A/D converter enters the wait state.
Notes:
ADDRA
ADDRB
ADDRC
ADDRD
ADST
ADF
Scan Mode
1. Vertical arrows indicate instructions executed by software.
2. Data currently being converted is ignored.
(AN3)
(AN2)
(AN0)
(AN1)
Idle
Figure 15.4 Example of A/D Converter Operation
(Scan Mode, Channels AN0 to AN2 Selected)
Idle
Idle
A/D conversion 1
Set *
1
A/D conversion 2
Contimuous A/D conversion
Idle
A/D conversion result 1
A/D conversion 3
Idle
Rev. 5.00 Sep. 01, 2009 Page 453 of 656
Idle
A/D conversion time
A/D conversion 4
A/D conversion result 2
A/D conversion result 3
Section 15 A/D Converter
A/D conversion 5
A/D conversion result 2
REJ09B0071-0500
Clear *
*
2
1
Idle
Idle
Idle
Clear *
1