EP9307-IRZ Cirrus Logic Inc, EP9307-IRZ Datasheet - Page 763

• Manufacturer Part Number: EP9307-IRZ
• Description: IC ARM9 SOC ARM920T 272TFBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9307-IRZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 272-TFBGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 14
• Ram Memory Size: 32MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: TFBGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9307A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1133 - KIT DEVELOPMENT EP9307 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1256

DS785UM1
26.1 Introduction
The keypad interface has the following features:
If the system does not use a keyboard, the Row[7:0] and Column[7:0] pins can be remapped
to General Purpose Input/Output (GPIO) pins. For details, see
page 5-25
A block diagram for the key array scanning circuitry is shown in
Note: This chapter applies only to the EP9307, EP9312, and EP9315 processors.
• A maximum 8x8 array of normally open, single pole contacts
• A back drive feature to minimize capacitance effects
• A typical scan count limit of 3 consecutive scans
• A maximum mechanical bounce time for a key press of 20 milliseconds
• A typical interrupt interval between 24 and 44 milliseconds
• A low-power wakeup mode
• A three-key reset
Column lines
Inactive
and
Chapter
Debounce Counter
Pipeline
Precounter
28,
Figure 26-1. Key Array Block Diagram
Table 28-4 on page
Column Mux
Copyright 2007 Cirrus Logic
Diagnostics
Row/Collumn
Counter
Scan
Control
Row Decoder
28-8.
Pipeline
Interrupt
Controller
Temp Key Regs
26Keypad Interface
Row lines
3 Key Reset Key Detector
Chapter
Figure
Equal
Compare
Key Regs
3 Key Reset
Interrrupt
26-1.
5,
Chapter 26
“DeviceCfg” on
26-1
26