EP9307-IRZ Cirrus Logic Inc, EP9307-IRZ Datasheet - Page 376

• Manufacturer Part Number: EP9307-IRZ
• Description: IC ARM9 SOC ARM920T 272TFBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9307-IRZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 272-TFBGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 14
• Ram Memory Size: 32MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: TFBGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9307A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1133 - KIT DEVELOPMENT EP9307 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1256

9
RXDEnq
RXBCA
9-74
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
31
15
31
15
Address:
Chip Reset:
Soft Reset:
Definition:
Bit Descriptions:
Address:
30
14
30
14
29
13
29
13
28
12
28
12
0x8001_009C - Read/Write
0x0000_0000
Unchanged
Receive Descriptor Enqueue register. The Receive Descriptor Enqueue
register is used to define the number of valid entries in the descriptor queue.
The register operates as follows: only the Receive descriptor Increment field is
writable and any value written to this field is added to the existing Receive
Descriptor Value. Whenever complete descriptors are read by the MAC, the
Receive Descriptor Value is decremented by the number read. For example, if
the Receive Descriptor Value is 0x07 and the Host writes 03 to the Receive
Descriptor Increment, the new Value will be 0x0A. If the controller then reads
two descriptors, the Value will be 0x08.
RSVD:
RDV:
RDI:
0x8001_0088 - Read/Write
RSVD
27
27
11
11
26
10
26
10
Copyright 2007 Cirrus Logic
25
25
9
9
Reserved. Unknown During Read.
Receive Descriptor Value.
Receive Descriptor Increment.
24
24
8
8
RBCA
RBCA
RDV
23
23
7
7
22
22
6
6
21
21
5
5
20
20
4
4
RDI
19
19
3
3
18
18
2
2
17
17
1
1
DS785UM1
16
16
0
0