EP9307-IRZ Cirrus Logic Inc, EP9307-IRZ Datasheet - Page 754

• Manufacturer Part Number: EP9307-IRZ
• Description: IC ARM9 SOC ARM920T 272TFBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9307-IRZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 272-TFBGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 14
• Ram Memory Size: 32MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: TFBGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9307A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1133 - KIT DEVELOPMENT EP9307 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1256

25
25-16
Analog Touch Screen Interface
EP93xx User’s Guide
25.2.6 Polled and Interrupt-Driven Modes
25.2.7 Touch Screen Package Dependency
The ADC provides support for synchronous sampling, in both polled mode and interrupt-
driven mode. In either mode, the touch screen scanning state machine should be disabled by
setting bit 15 of the TSSetup register to zero.
The ADC decimation filter conversion value appears in the TSXYResult register. With the
touch screen scanning state machine disabled, bit 31 of this register is the SDR, or
Synchronous Data Ready, bit. This bit is set when a new valid conversion value appears in
this register, and is cleared when this register is read. Hence, in polled mode, the
TSXYResult register may be read repeatedly. If two consecutive reads show the bit clear and
then set, the second read has a new valid value.
Conversion data may also be processed using interrupts from this module. If bit 11 in the
TSSetup2 register (the RINTEN bit) is set, an interrupt occurs whenever the SDR bit in the
TSXYResult register is set. Therefore, an interrupt handler can read the TSXYResult register
whenever a new valid sample appears in the register, which both returns a new conversion
value and clears the interrupt.
The Touch block uses the following external pins
ADC_GND
DAC_VDD
ADC_VDD
Signals
sXm
sYm
sXp
sYp
Xm
Ym
Xp
Yp
Touch Screen ADC power, nominal 3.3V. This supply is internally diode connected to the
Table 25-3. External Signal Functions
DAC_VDD supply to provide additional ESD protection.
Touch Screen ADC X axis voltage feedback inputs.
Touch Screen ADC Y axis voltage feedback inputs.
Should be connected to ADC_VDD on the board.
Should be connected to DAC_VDD on the board.
Copyright 2007 Cirrus Logic
Touch Screen ADC X axis analog bias output.
Touch Screen ADC Y axis analog bias output.
Touch Screen ADC ground
Function
DS785UM1