EP9307-IRZ Cirrus Logic Inc, EP9307-IRZ Datasheet - Page 14

• Manufacturer Part Number: EP9307-IRZ
• Description: IC ARM9 SOC ARM920T 272TFBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9307-IRZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 272-TFBGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 14
• Ram Memory Size: 32MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: TFBGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9307A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1133 - KIT DEVELOPMENT EP9307 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1256

EP93xx User’s Guide
Chapter 27. IDE Interface .................................................................................... 27-1
Chapter 28. GPIO Interface ................................................................................. 28-1
Chapter 29. Security............................................................................................ 29-1
Chapter 30. Glossary........................................................................................... 30-1
Chapter 31. EP93XX Register List...................................................................... 31-1
Figures
xiv
Figure 1-1. EP9301 Block Diagram ...............................................................................................................1-2
Figure 1-2. EP9302 Block Diagram ..............................................................................................................1-3
Figure 1-3. EP9307 Block Diagram ...............................................................................................................1-3
Figure 1-4. EP9312 Block Diagram ...............................................................................................................1-4
Figure 1-5. EP9315 Block Diagram ...............................................................................................................1-4
Figure 2-1. ARM920T Block Diagram ...........................................................................................................2-2
Figure 2-2. Typical AMBA AHB System ........................................................................................................2-7
Figure 2-3. Main Data Paths .........................................................................................................................2-8
27.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27-1
27.2 Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27-1
27.3 Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27-10
28.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28-1
28.2 Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28-9
29.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29-1
29.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29-1
29.3 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29-1
29.4 Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29-2
27.2.1 Diagrams and State Machines ....................................................................................27-2
27.2.2 PIO Operations............................................................................................................27-3
27.2.3 MDMA Operations .......................................................................................................27-4
27.2.4 UDMA Operations .......................................................................................................27-5
27.2.5 Performance Considerations .......................................................................................27-5
27.2.6 UDMA Example ...........................................................................................................27-6
27.2.7 DMA Request Latency.................................................................................................27-7
27.2.8 IDE Package Dependency ..........................................................................................27-9
28.1.1 Memory Map................................................................................................................28-3
28.1.2 Functional Description .................................................................................................28-3
28.1.3 Reset ...........................................................................................................................28-5
28.1.4 GPIO Pin Map .............................................................................................................28-6
27.2.7.1 DMA Request Deassertion ........................................................................27-7
27.2.7.2 DMA Request Latency Overview...............................................................27-7
27.2.7.3 IDE DMA Programming Considerations ....................................................27-8
27.2.8.1 System Configuration Constraints .............................................................27-9
27.2.8.2 Bus Bandwidth Requirements ...................................................................27-9
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Copyright 2007 Cirrus Logic, Inc.
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