EP9307-IRZ Cirrus Logic Inc, EP9307-IRZ Datasheet - Page 280

• Manufacturer Part Number: EP9307-IRZ
• Description: IC ARM9 SOC ARM920T 272TFBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9307-IRZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 272-TFBGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 14
• Ram Memory Size: 32MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: TFBGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9307A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1133 - KIT DEVELOPMENT EP9307 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1256

8
8-16
Graphics Accelerator
EP93xx User’s Guide
8.6.3 Block Fill Function
The following sequence describes how to carry out a Block Fill function:
5. Write the word-aligned value of the SDRAM address ‘for the beginning of the line draw’
6. Write the desired background color value to the BG field in the
7. Write the desired foreground color value to the MASK field in the
8. Write YINC = 0xFFF and XINC = 0x49C to the
9. Write WIDTH = 0x50 to the “BLKDESTWIDTH”:register, where
10. Write HEIGHT = 0x0 to the
11. Clear the
12.Write Line = ‘1’, DXDIR = ‘0’, DYDIR = ‘0’, BG = ‘0’, P = 0x4, and INTEN = ‘1’ to the
13.Write EN = ‘1’ to the
14.Wait for an interrupt or poll for EN = ‘0’ in the
1. Setup BLOCKMASK Register
2. Setup DESTPIXELSTRT Register
to the
register. The ‘off’ pattern bits of the line will be displayed using the background color.
register. The ‘on’ pattern bits of the line will be displayed using the foreground color.
“BLOCKCTRL”
becomes cleared to ‘0’, the Breshenham’s Algorithm line draw function is complete.
[101% 2] x 8 = 1 x 8 = 8 = 0x8, and
2] x 8 = 0 x 0 = 0 = 0x0
(81 / 281) x 4095 = 1180.409, which rounds to 1180 = 0x49C
80 = 0x50
0.0686 = 0x0
pixel-fill value is dependant on the color depth.
register.
SPEL = [X2% 2 (pixel depth / 8-bit byte)] x 8 = [101% 2 (16-bits / 8-bits)] x 8-bits =
EPEL = [X1% 2 (pixel depth / 8-bit byte)] x 8 = [20% 2 (16-bits / 8-bits)] x 8-bits = [20%
YINC = 4095 = 0xFFF
XINC = [abs(X2 - X1) / abs(Y2 - Y1)] x 4095 = [abs(20 - 101) / abs(20-301)] x 4095 =
WIDTH = abs(X2 - X1)% 4096 - 1 = abs(20 - 101)% 4096 - 1 = 81% 4096 - 1 = 81 - 1 =
HEIGHT = [abs(Y2 - Y1) - 1] / 4096 = [abs(20 - 301) - 1]/ 4096 = (281 - 1) / 4096 =
Write the desired pixel-fill value to the MASK field in the
Write the desired values to the SPEL field and the EPEL field in the
“BLKDESTSTRT”
“BLOCKCTRL”
register
“BLOCKCTRL”
register.
Copyright 2007 Cirrus Logic
register by writing 0x0000_0000 to it
“BLKDESTHEIGHT”
register
“BLOCKCTRL”
“LINEINC”
register, where
“BLOCKMASK”
register, where
register. When the EN bit
“BACKGROUND”
“BLOCKMASK”
“DESTPIXELSTRT”
register. The
DS785UM1