ATMEGA168-15AZ Atmel, ATMEGA168-15AZ Datasheet - Page 36

• Manufacturer Part Number: ATMEGA168-15AZ
• Description: MCU AVR 16K FLASH 15MHZ 32-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA168-15AZ

• Package / Case: 32-TQFP, 32-VQFP
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 23
• Eeprom Size: 512 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Program Memory Size: 16KB (16K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: I²C, SPI, UART/USART
• Core Size: 8-Bit
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Interface Type: 2-Wire/USART/Serial
• Total Internal Ram Size: 1KB
• # I/os (max): 23
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 32
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7. Power Management and Sleep Modes
7.0.1
36
ATmega48/88/168 Automotive
Sleep Mode Control Register – SMCR
Table 6-14.
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
To enter any of the five sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select
which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, or Standby) will be
activated by the SLEEP instruction. See
while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for four cycles in
addition to the start-up time, executes the interrupt routine, and resumes execution from the
instruction following SLEEP. The contents of the Register File and SRAM are unaltered when
the device wakes up from sleep. If a reset occurs during sleep mode, the MCU wakes up and
executes from the Reset Vector.
Figure 6-1 on page 24
distribution. The figure is helpful in selecting an appropriate sleep mode.
The Sleep Mode Control Register contains control bits for power management.
• Bits 7..4 Res: Reserved Bits
These bits are unused bits in the ATmega48/88/168, and will always read as zero.
• Bits 3..1 – SM2..0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in
Table 7-1.
Bit
Read/Write
Initial Value
CLKPS3
SM2
1
1
1
0
0
0
0
1
Clock Prescaler Select
Sleep Mode Select
R
7
–
0
CLKPS2
SM1
0
0
1
1
0
1
1
1
presents the different clock systems in the ATmega48/88/168, and their
R
6
–
0
CLKPS1
R
5
–
0
SM0
0
1
0
1
0
0
1
1
Table 7-1
R
4
–
0
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Power-save
Reserved
CLKPS0
for a summary. If an enabled interrupt occurs
SM2
R/W
3
0
1
0
1
SM1
R/W
2
0
Clock Division Factor
SM0
R/W
Table
1
0
Reserved
Reserved
Reserved
7-1.
R/W
SE
0
0
7530I–AVR–02/10
SMCR