ATMEGA168-15AZ Atmel, ATMEGA168-15AZ Datasheet - Page 304

• Manufacturer Part Number: ATMEGA168-15AZ
• Description: MCU AVR 16K FLASH 15MHZ 32-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA168-15AZ

• Package / Case: 32-TQFP, 32-VQFP
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 23
• Eeprom Size: 512 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Program Memory Size: 16KB (16K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: I²C, SPI, UART/USART
• Core Size: 8-Bit
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Interface Type: 2-Wire/USART/Serial
• Total Internal Ram Size: 1KB
• # I/os (max): 23
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 32
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 27-1.
Notes:
304
Symbol
t
t
t
t
t
t
HIGH
SU;STA
HD;DAT
SU;DAT
SU;STO
BUF
1. In ATmega48/88/168, this parameter is characterized and not 100% tested.
2. Required only for f
3. C
4. f
5. This requirement applies to all ATmega48/88/168 2-wire Serial Interface operation. Other devices connected to the 2-wire
6. The actual low period generated by the ATmega48/88/168 2-wire Serial Interface is (1/f
7. The actual low period generated by the ATmega48/88/168 2-wire Serial Interface is (1/f
ATmega48/88/168 Automotive
Serial Bus need only obey the general f
than 6 MHz for the low time requirement to be strictly met at f
ment will not be strictly met for f
communicate at full speed (400 kHz) with other ATmega48/88/168 devices, as well as any other device with a proper t
acceptance margin.
Parameter
High period of the SCL clock
Set-up time for a repeated START condition
Data hold time
Data setup time
Setup time for STOP condition
Bus free time between a STOP and START
condition
CK
b
= capacitance of one bus line in pF.
= CPU clock frequency
2-wire Serial Bus Requirements
Figure 27-1. 2-wire Serial Bus Timing
SCL
SCL
SDA
> 100 kHz.
t
SU;STA
SCL
> 308 kHz when f
SCL
requirement.
t
HD;STA
t
t
of
LOW
CK
= 8 MHz. Still, ATmega48/88/168 devices connected to the bus may
f
f
f
f
f
f
f
f
f
f
f
f
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
Condition
t
HIGH
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
SCL
t
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
HD;DAT
= 100 kHz.
t
LOW
t
SU;DAT
SCL
SCL
250
100
Min
4.0
0.6
4.7
0.6
4.0
0.6
4.7
1.3
0
0
- 2/f
- 2/f
CK
CK
), thus the low time require-
), thus f
t
SU;STO
t
r
CK
3.45
Max
0.9
–
–
–
–
–
–
–
–
–
–
must be greater
7530I–AVR–02/10
t
BUF
Units
LOW
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs