ATMEGA168-15AZ Atmel, ATMEGA168-15AZ Datasheet - Page 303

• Manufacturer Part Number: ATMEGA168-15AZ
• Description: MCU AVR 16K FLASH 15MHZ 32-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA168-15AZ

• Package / Case: 32-TQFP, 32-VQFP
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 23
• Eeprom Size: 512 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Program Memory Size: 16KB (16K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: I²C, SPI, UART/USART
• Core Size: 8-Bit
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Interface Type: 2-Wire/USART/Serial
• Total Internal Ram Size: 1KB
• # I/os (max): 23
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 32
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.8.1
27. 2-wire Serial Interface Characteristics
Table 27-1
Interface meets or exceeds these requirements under the noted conditions.
Timing symbols refer to
Table 27-1.
7530I–AVR–02/10
Symbol
VIL
VIH
Vhys
VOL
tr
tof
tSP
I
C
f
Rp
t
t
i
SCL
HD;STA
LOW
(1)
(1)
i
(1)
(1)
(1)
(1)
RC Oscillator Precision for LIN Slave implementation
describes the requirements for devices connected to the 2-wire Serial Bus. The ATmega48/88/168 2-wire Serial
Parameter
Input Low-voltage
Input High-voltage
Hysteresis of Schmitt Trigger Inputs
Output Low-voltage
Rise Time for both SDA and SCL
Output Fall Time from V
Spikes Suppressed by Input Filter
Input Current each I/O Pin
Capacitance for each I/O Pin
SCL Clock Frequency
Value of Pull-up resistor
Hold Time (repeated) START Condition
Low Period of the SCL Clock
2-wire Serial Bus Requirements
Figure
For LIN slave devices, the precision of the RC oscillator before and after re-synchronization are
described in the Figure 26-2
Table 26-2.
Parameter
F
F
TOL_UNSYNCH
TOL_SYNCH
27-1.
IHmin
to V
ILmax
Oscillator Tolerance Before and After re-Synchronization Algorithm
(2.7V<V
Clock Tolerance
Deviation of slave node clock from the nominal clock rate before
synchronization; relevant for nodes making use of
synchronization and direct SYNCH BREAK detection.
Deviation of slave node clock relative to the master node clock
after synchronization; relevant for nodes making use of
synchronization; any slave node must stay within this tolerance
for all fields of a frame which follow the SYNCH FIELD.
Note: For communication between any two nodes their bit rate
must not differ by more than ±2%.
CC
<5.5V, -40°C to +125°C)
f
CK
(4)
10 pF < C
0.1V
> max(16f
3 mA sink current
f
f
SCL
f
f
SCL
f
f
SCL
SCL
SCL
SCL
CC
Condition
> 100 kHz
ATmega48/88/168 Automotive
< V
> 100 kHz
> 100 kHz
100 kHz
100 kHz
100 kHz
b
< 400 pF
SCL
i
< 0.9V
, 250kHz)
(6)
(7)
CC
(3)
(5)
20 + 0.1C
20 + 0.1C
V
----------------------------
V
----------------------------
0.05 V
CC
CC
0.7 V
3mA
3mA
-0.5
Min
-10
4.0
0.6
4.7
1.3
–
–
0
0
–
0
0,4V
0,4V
CC
CC
b
b
(2)
(3)(2)
(3)(2)
V
0.3 V
1000ns
------------------ -
CC
300ns
--------------- -
50
Max
300
250
400
±14.0 %
±2.0 %
0.4
C
10
10
C
–
–
–
–
–
F/F
+ 0.5
b
(2)
b
CC
Master
Units
kHz
µA
pF
ns
ns
ns
µs
µs
µs
µs
V
V
V
V
303