ATtiny5 Atmel Corporation, ATtiny5 Datasheet - Page 99

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ATtiny5

Manufacturer Part Number
ATtiny5
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny5

Flash (kbytes)
0.5 Kbytes
Pin Count
6
Max. Operating Frequency
12 MHz
Cpu
8-bit AVR
# Of Touch Channels
1
Hardware Qtouch Acquisition
No
Max I/o Pins
4
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
8
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.03
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
2
Input Capture Channels
1
Pwm Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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14.3.2
14.3.3
14.3.4
14.3.5
8127E–AVR–11/11
Disabling
Frame Format
Parity Bit Calculation
Supported Characters
Provided that the NVM enable bit has been cleared, the TPI is automatically disabled if the
RESET pin is released to inactive high state or, alternatively, if V
RESET pin.
If the NVM enable bit is not cleared a power down is required to exit TPI programming mode.
See NVMEN bit in
The TPI physical layer supports a fixed frame format. A frame consists of one character, eight
bits in length, and one start bit, a parity bit and two stop bits. Data is transferred with the least
significant bit first.
Figure 14-4. Serial frame format.
Symbols used in
The parity bit is always calculated using even parity. The value of the bit is calculated by doing
an exclusive-or of all the data bits, as follows:
where:
The BREAK character is equal to a 12 bit long low level. It can be extended beyond a bit-length
of 12.
Figure 14-5. Supported characters.
TPIDATA
TPIDATA
TPICLK
TPIDATA
ST:
D0-D7: Data bits (least significant bit sent first)
P:
SP1:
SP2:
P = D0
P:
D0-D7:
IDLE
IDLE
IDLE
Start bit (always low)
Parity bit (using even parity)
Stop bit 1 (always high)
Stop bit 2 (always high)
D1
Figure
“TPISR – Tiny Programming Interface Status Register” on page
ST
ST
Parity bit using even parity
Data bits of the character
D2
14-4:
D3
D0
D0
D4
D1
D1
D5
DATA CHARACTER
BREAK CHARACTER
D6
D7
D7
D7
0
P
P
HV
ATtiny4/5/9/10
is no longer applied to the
SP1
SP1
SP2
SP2
107.
IDLE/ST
IDLE/ST
IDLE/ST
99

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