ATtiny5 Atmel Corporation, ATtiny5 Datasheet - Page 76

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ATtiny5

Manufacturer Part Number
ATtiny5
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny5

Flash (kbytes)
0.5 Kbytes
Pin Count
6
Max. Operating Frequency
12 MHz
Cpu
8-bit AVR
# Of Touch Channels
1
Hardware Qtouch Acquisition
No
Max I/o Pins
4
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
8
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.03
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
2
Input Capture Channels
1
Pwm Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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11.11.2
76
ATtiny4/5/9/10
TCCR0B – Timer/Counter0 Control Register B
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Combined with WGM03:2 bits of TCCR0B, these bits control the counting sequence of the coun-
ter, the source for maximum (TOP) counter value, and what type of waveform to generate. See
Table
ter), Clear Timer on Compare match (CTC) mode, and three types of Pulse Width Modulation
(PWM) modes.
Table 11-5.
• Bit 7 – ICNC0: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the noise canceler is
activated, the input from the Input Capture pin (ICP0) is filtered. The filter function requires four
successive equal valued samples of the ICP0 pin for changing its output. The Input Capture is
therefore delayed by four oscillator cycles when the noise canceler is enabled.
• Bit 6 – ICES0: Input Capture Edge Select
This bit selects which edge on the Input Capture pin (ICP0) that is used to trigger a capture
event. When the ICES0 bit is written to zero, a falling (negative) edge is used as trigger, and
when the ICES0 bit is written to one, a rising (positive) edge will trigger the capture.
Bit
0x2D
Read/Write
Initial Value
Mode
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
11-5. Modes of operation supported by the Timer/Counter unit are: Normal mode (coun-
WGM
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
3:0
Waveform Generation Modes
ICNC0
(“Modes of Operation” on page
R/W
0
7
0
Mode of Operation
Normal
PWM, Phase Correct, 8-bit
PWM, Phase Correct, 9-bit
PWM, Phase Correct, 10-bit
CTC (
Fast PWM, 8-bit
Fast PWM, 9-bit
Fast PWM, 10-bit
PWM, Phase & Freq. Correct
PWM, Phase & Freq. Correct
PWM, Phase Correct
PWM, Phase Correct
CTC (
(Reserved)
Fast PWM
Fast PWM
ICES0
R/W
6
0
Clear Timer on Compare
Clear Timer on Compare
R
5
0
WGM03
R/W
4
0
63).
WGM02
)
)
R/W
3
0
TOP
0xFFFF
0x00FF
0x01FF
0x03FF
OCR0A
0x00FF
0x01FF
0x03FF
ICR0
OCR0A
ICR0
OCR0A
ICR0
ICR0
OCR0A
CS02
R/W
2
0
Update of
OCR0
Immediate
TOP
TOP
TOP
Immediate
TOP
TOP
TOP
BOTTOM
BOTTOM
TOP
TOP
Immediate
TOP
TOP
CS01
R/W
1
0
x
at
CS00
R/W
0
0
8127E–AVR–11/11
TOV0 Flag
Set on
MAX
BOTTOM
BOTTOM
BOTTOM
MAX
TOP
TOP
TOP
BOTTOM
BOTTOM
BOTTOM
BOTTOM
MAX
TOP
TOP
TCCR0B

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