ATtiny5 Atmel Corporation, ATtiny5 Datasheet - Page 8

• Manufacturer Part Number: ATtiny5
• Manufacturer: Atmel Corporation

Specifications of ATtiny5

• Flash (kbytes): 0.5 Kbytes
• Pin Count: 6
• Max. Operating Frequency: 12 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 1
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 4
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 8
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.03
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 2
• Input Capture Channels: 1
• Pwm Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

4.4
4.4.1
8
General Purpose Register File
ATtiny4/5/9/10
The X-register, Y-register, and Z-register
The Register File is optimized for the AVR Enhanced RISC instruction set. In order to achieve
the required performance and flexibility, the following input/output schemes are supported by the
Register File:
Figure 4-2
Figure 4-2.
Note:
Most of the instructions operating on the Register File have direct access to all registers, and
most of them are single cycle instructions.
Registers R26..R31 have some added functions to their general purpose usage. These registers
are 16-bit address pointers for indirect addressing of the data space. The three indirect address
registers X, Y, and Z are defined as described in
• One 8-bit output operand and one 8-bit result input
• Two 8-bit output operands and one 8-bit result input
• One 16-bit output operand and one 16-bit result input
A typical implementation of the AVR register file includes 32 general prupose registers but
ATtiny4/5/9/10 implement only 16 registers. For reasons of compatibility the registers are num-
bered R16...R31, not R0...R15.
Registers
Purpose
Working
General
below shows the structure of the 16 general purpose working registers in the CPU.
AVR CPU General Purpose Working Registers
7
R16
R17
R18
R26
R27
R28
R29
R30
R31
…
0
Figure
4-3.
X-register High Byte
Y-register High Byte
Z-register High Byte
X-register Low Byte
Z-register Low Byte
Y-register Low Byte
8127E–AVR–11/11