UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 89

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

4.2.7 Port 12
output mode in 1-bit units using port mode register 12 (PM12). When used as an input port only for P120, use of an
on-chip pull-up resistor can be specified by pull-up resistor option register 12 (PU12).
detection, connecting resonator for main system clock, connecting resonator for subsystem clock, and external clock
input for main system clock.
Port 12 is a 1-bit I/O port with an output latch and a 4-bit input port. Only P120 can be set to the input mode or
This port can also be used as pins for external interrupt request input, potential input for external low-voltage
Reset signal generation sets port 12 to input mode.
Figures 4-11 to 4-13 show block diagrams of port 12.
Caution
Remark P121 and P122 can be used as on-chip debug mode setting pins (OCD0A, OCD0B) when the on-chip
debug function is used. For detail, see CHAPTER 25 ON-CHIP DEBUG FUNCTION.
When using the P121 to P124 pins to connect a resonator for the main system clock (X1, X2) or
subsystem clock (XT1, XT2), or to input an external clock for the main system clock (EXCLK),
the X1 oscillation mode, XT1 oscillation mode, or external clock input mode must be set by
using the clock operation mode select register (OSCCTL) (for details, see 5.3 (1)
operation mode select register (OSCCTL) and (3) Setting of operation mode for subsystem
clock pin). The reset value of OSCCTL is 00H (all of the P121 to P124 pins are input port pins).
CHAPTER 4 PORT FUNCTIONS
User’s Manual U18698EJ1V0UD
Clock
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