UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 48

8BIT UC, 32K FLASH, 1KB RAM, LCD

UPD78F0413GA-GAM-AX

Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0413GA-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal

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(2) CALLT instruction table area
(3) Option byte area
(4) CALLF instruction entry area
(5) On-chip debug security ID setting area
48
The 64-byte area 0040H to 007FH can store the subroutine entry address of a 1-byte call instruction (CALLT).
A 5-byte area of 0080H to 0084H and 1080H to 1084H can be used as an option byte area. Set the option byte
at 0080H to 0084H when the boot swap is not used, and at 0080H to 0084H and 1080H to 1084H when the boot
swap is used. For details, see CHAPTER 23 OPTION BYTE.
The area 0800H to 0FFFH can perform a direct subroutine call with a 2-byte call instruction (CALLF).
A 10-byte area of 0085H to 008EH and 1085H to 108EH can be used as an on-chip debug security ID setting
area. Set the on-chip debug security ID of 10 bytes at 0085H to 008EH when the boot swap is not used and at
0085H to 008EH and 1085H to 108EH when the boot swap is used. For details, see CHAPTER 25 ON-CHIP
DEBUG FUNCTION.
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U18698EJ1V0UD

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