UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 267

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

Caution If writing is performed to the WAFG flag with a 1-bit manipulation instruction, the RIFG flag
Remark Fixed-cycle interrupts and alarm match interrupts use the same interrupt source (INTRTC). When
This flag indicates the status of generation of the constant-period interrupt. When the constant-period interrupt is
generated, it is set to “1”.
This flag is cleared when “0” is written to it. Writing “1” to it is invalid.
This status flag indicates whether the setting of RWAIT is valid.
Before reading or writing the counter value, confirm that the value of this flag is 1.
This bit controls the operation of the counter.
Be sure to write “1” to it to read or write the counter value.
Because RSUBC continues operation, complete reading or writing of it in 1 second, and clear this bit back to 0.
When RWAIT = 1, it takes up to 1 clock (32.768 kHz) until the counter value can be read or written.
If RSUBC overflows when RWAIT = 1, it counts up after RWAIT = 0. If the second count register is written,
however, it does not count up because RSUBC is cleared.
RWAIT
RWST
RIFG
may be cleared. Therefore, to perform writing to the WAFG flag, be sure to use an 8-bit
manipulation instruction, and at this time, set 1 to the RIFG flag to invalidate writing. In the
same way, to perform writing to the RIFG flag, use an 8-bit manipulation instruction and set 1
the WAFR flag.
using these two types of interrupts at the same time, which interrupt occurred can be judged by
checking the fixed-cycle interrupt status flag (RIFG) and the alarm detection status flag (WAFG)
upon INTRTC occurrence.
0
1
0
1
0
1
Figure 9-4. Format of Real-Time Counter Control Register 1 (RTCC1) (2/2)
Constant-period interrupt is not generated.
Constant-period interrupt is generated.
Counter is operating.
Mode to read or write counter value
Sets counter operation.
Stops SEC to YEAR counters. Mode to read or write counter value
CHAPTER 9 REAL-TIME COUNTER
User’s Manual U18698EJ1V0UD
Constant-period interrupt status flag
Wait status flag of real-time counter
Wait control of real-time counter
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