UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 320

8BIT UC, 32K FLASH, 1KB RAM, LCD

UPD78F0413GA-GAM-AX

Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0413GA-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal

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(3) Baud rate generator control register 0 (BRGC0)
320
Address: FF71H After reset: 1FH R/W
BRGC0
Notes 1.
Cautions 1. Make sure that bit 6 (TXE0) and bit 5 (RXE0) of the ASIM0 register = 0 when rewriting the
Symbol
This register selects the base clock of serial interface UART0 and the division value of the 5-bit counter.
BRGC0 can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 1FH.
2.
2. The baud rate value is the output clock of the 5-bit counter divided by 2.
If the peripheral hardware clock (f
f
When selecting the TM50 output as the base clock, Start the operation of 8-bit timer/event counter 50
first and then enable the timer F/F inversion operation (TMC501 = 1).
MDL04
PRS
TPS01
TPS01
V
V
MDL04 to MDL00 bits.
7
0
0
1
1
0
0
0
0
1
1
1
1
1
1
DD
DD
operating frequency varies depending on the supply voltage.
Figure 13-4. Format of Baud Rate Generator Control Register 0 (BRGC0)
= 2.7 to 5.5 V: f
= 1.8 to 2.7 V: f
MDL03
TPS00
TPS00
6
0
1
0
1
0
1
1
1
1
1
1
1
1
1
PRS
PRS
CHAPTER 13 SERIAL INTERFACE UART0
TM50 output
f
f
f
PRS
PRS
PRS
MDL02
/2
/2
/2
5
0
0
0
0
0
0
1
1
1
1
10 MHz
5 MHz
3
5
User’s Manual U18698EJ1V0UD
Note 2
PRS
MDL04
MDL01
1 MHz
250 kHz
62.5 kHz
) operates on the high-speed system clock (f
f
PRS
4
0
0
1
1
1
0
0
1
1
= 2 MHz
Base clock (f
MDL03
MDL00
3
0
1
0
0
1
0
1
0
1
2.5 MHz
625 kHz
156.25 kHz
f
PRS
XCLK0
= 5 MHz
) selection
10
26
27
28
29
30
31
k
8
9
MDL02
2
Setting prohibited
f
f
f
f
f
f
f
f
f
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
XCLK0
4 MHz
1 MHz
250 kHz
f
PRS
Selection of 5-bit counter
Note 1
/8
/9
/10
/26
/27
/28
/29
/30
/31
= 8 MHz
MDL01
output clock
1
5 MHz
1.25 MHz
312.5 kHz
f
PRS
XH
= 10 MHz
MDL00
) (XSEL = 1), the
0

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