UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 136
UPD78F0413GA-GAM-AX
Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet
1.UPD78F0413GA-GAM-AX.pdf
(562 pages)
Specifications of UPD78F0413GA-GAM-AX
Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal
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(4) CPU clock changing from internal high-speed oscillation clock (B) to high-speed system clock (C)
Note The value of this flag can be changed only once after a reset release. This setting is not necessary if it has
Caution Set the clock after the supply voltage has reached the operable voltage of the clock to be set (see
(5) CPU clock changing from internal high-speed oscillation clock (B) to subsystem clock (D)
136
Status Transition
(B)
(B)
Status Transition
(B)
Remarks 1. (A) to (I) in Table 5-5 correspond to (A) to (I) in Figure 5-15.
already been set.
(C) (X1 clock)
(C) (external main clock)
(D)
CHAPTER 27 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS)).
2. EXCLK, OSCSEL, OSCSELS:
(Setting sequence of SFR registers)
(Setting sequence of SFR registers)
MSTOP:
XSEL, MCM0:
CSS:
Table 5-5. CPU Clock Transition and SFR Register Setting Examples (2/4)
Setting Flag of SFR Register
Setting Flag of SFR Register
Bits 7, 6, and 4 of the clock operation mode select register (OSCCTL)
Bit 7 of the main OSC control register (MOC)
Bits 2 and 0 of the main clock mode register (MCM)
Bit 4 of the processor clock control register (PCC)
CHAPTER 5 CLOCK GENERATOR
User’s Manual U18698EJ1V0UD
registers are already set
Unnecessary if these
EXCLK
0
1
OSCSELS
1
OSCSEL
1
1
high-speed system clock
Unnecessary if the CPU
Waiting for Oscillation
MSTOP
is operating with the
0
0
Stabilization
Necessary
Must not be
checked
Must be
Register
checked
OSTC
XSEL
1
1
Note
CSS
1
MCM0
1
1
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