UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 408
UPD78F0413GA-GAM-AX
Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet
1.UPD78F0413GA-GAM-AX.pdf
(562 pages)
Specifications of UPD78F0413GA-GAM-AX
Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal
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15.8.2 External resistance division method
using internal resistors. Figure 15-24 shows examples of LCD drive voltage connection, corresponding to each bias
method.
408
The 78K0/LC3 can also use external voltage divider resistors for generating LCD drive power supplies, without
Figure 15-24. Examples of LCD Drive Power Connections (External Resistance Division Method) (1/2)
Note Connect V
(example of V
(example of V
SCOC
SCOC
(MDSET1, MDSET0 = 0, 0)
(MDSET1, MDSET0 = 0, 0)
(a) Static display mode
(c) 1/2 bias method
P40/KR0
P40/KR0
V
V
V
V
V
V
V
LC0
LC1
LC2
V
LC0
LC1
LC2
SS
SS
LC1
V
DD
DD
V
LC0
LC0
= V
and V
= 5 V, V
= 5 V, V
= V
DD
P-ch
DD
P-ch
LC2
LC0
LC0
directly to GND or V
CHAPTER 15 LCD CONTROLLER/DRIVER
V
V
V
V
P40/
KR0
V
V
V
V
V
P40/KR0
V
DD
LC0
LC1
LC2
SS
DD
LC0
LC1
LC2
SS
= 5 V)
= 5 V)
Note
Note
R
R
User’s Manual U18698EJ1V0UD
LC0
.
(example of V
(example of V
SCOC
SCOC
(MDSET1, MDSET0 = 0, 0)
(MDSET1, MDSET0 = 0, 0)
(b) Static display mode
P40/KR0
P40/KR0
(d) 1/2 bias method
V
V
V
V
V
V
V
LC0
LC1
LC2
V
SS
LC0
LC1
LC2
SS
V
V
LC0
LC0
DD
DD
=
=
3
5
3
5
P-ch
= 5 V, V
= 5 V, V
P-ch
V
V
DD
DD
V
V
V
V
P40/
KR0
V
V
V
V
V
P40/
KR0
V
LC0
LC0
DD
LC0
LC1
LC2
SS
DD
LC0
LC1
LC2
SS
= 3 V)
= 3 V)
R
R
4
3
2R
3R
R
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