UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 381

8BIT UC, 32K FLASH, 1KB RAM, LCD

UPD78F0413GA-GAM-AX

Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0413GA-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal

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Symbol
Address: FFB1H
LCDM
(2)
Other than above
LCD display mode register (LCDM)
LCDM specifies whether to enable display operation.
pin/common pin output, gate booster circuit control, and the display mode.
LCDM is set using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets LCDM to 00H.
(Note and Caution are listed on the next page.)
LCDON
LCDON
SCOC
VAON
LCDM2
<7>
0
1
0
1
0
1
1
0
0
0
0
1
After reset:
Display off (all segment outputs are deselected.)
Display on
Output ground level to segment/common pin
Output deselect level to segment pin and LCD waveform to common pin
No gate voltage boosting
Gate voltage boosting
SCOC
<6>
LCDM1
00H
1
0
0
1
1
0
Figure 15-3. Format of LCD Display Mode Register
R/W
CHAPTER 15 LCD CONTROLLER/DRIVER
5
0
LCDM0
1
0
1
0
1
0
User’s Manual U18698EJ1V0UD
Segment pin/common pin output control
VAON
Gate booster circuit control
<4>
8
4
3
2
3
Static
Setting prohibited
LCD display enable/disable
Number of time slices
LCD controller/driver display mode selection
3
0
It also specifies whether to enable segment
Resistance division method
Notes 1, 2
LCDM2
2
Note 1
1/4
1/3
1/3
1/2
1/2
Note 3
LCDM1
1
Bias mode
LCDM0
0
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