UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 221

8BIT UC, 32K FLASH, 1KB RAM, LCD

UPD78F0413GA-GAM-AX

Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0413GA-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal

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(1) 8-bit timer counter 5n (TM5n)
(2) 8-bit timer compare register 5n (CR5n)
TM5n is an 8-bit register that counts the count pulses and is read-only.
The counter is incremented in synchronization with the rising edge of the count clock.
In the following situations, the count value is cleared to 00H.
<1> Reset signal generation
<2> When TCE5n is cleared
<3> When TM5n and CR5n match.
CR5n can be read and written by an 8-bit memory manipulation instruction.
The value set in CR5n is constantly compared with the 8-bit timer counter 5n (TM5n) count value, and an
interrupt request (INTTM5n) is generated if they match.
The value of CR5n can be set within 00H to FFH.
Reset signal generation sets CR5n to 00H.
Caution Do not write other values to CR5n during operation.
Remark n = 0 to 2
Address: FF16H (TM50), FF6FH (TM51), FF51H (TM52)
Address: FF17H (CR50), FF41H (CR51), FF59H (CR52)
(n = 0-2)
(n = 0-2)
Symbol
Symbol
TM5n
CR5n
Figure 7-5. Format of 8-Bit Timer Compare Register 5n (CR5n)
CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50, 51, AND 52
Figure 7-4. Format of 8-Bit Timer Counter 5n (TM5n)
User’s Manual U18698EJ1V0UD
After reset: 00H
After reset: 00H
R
R/W
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