UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 238

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

(1) 8-bit timer H compare register 0n (CMP0n)
(2) 8-bit timer H compare register 1n (CMP1n)
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Caution In the PWM output mode and carrier generator mode, be sure to set CMP1n when starting the
Remark n = 0 to 2, however, TOH0 and TOH1 only for TOHn
This register can be read or written by an 8-bit memory manipulation instruction. This register is used in all of the
timer operation modes.
This register constantly compares the value set to CMP0n with the count value of the 8-bit timer counter Hn and,
when the two values match, generates an interrupt request signal (INTTMHn) and inverts the output level of
TOHn.
Rewrite the value of CMP0n while the timer is stopped (TMHEn = 0).
A reset signal generation sets this register to 00H.
Caution CMP0n cannot be rewritten during timer count operation. CMP0n can be refreshed (the same
This register can be read or written by an 8-bit memory manipulation instruction. This register is used in the
PWM output mode and carrier generator mode.
In the PWM output mode, this register constantly compares the value set to CMP1n with the count value of the 8-
bit timer counter Hn and, when the two values match, inverts the output level of TOHn. No interrupt request
signal is generated.
In the carrier generator mode, the CMP1n register always compares the value set to CMP1n with the count value
of the 8-bit timer counter Hn and, when the two values match, generates an interrupt request signal (INTTMHn).
At the same time, the count value is cleared.
CMP1n can be rewritten during timer count operation.
If the value of CMP1n is rewritten while the timer is operating, the new value is latched and transferred to CMP1n
when the count value of the timer matches the old value of CMP1n, and then the value of CMP1n is changed to
the new value. If matching of the count value and the CMP1n value and writing a value to CMP1n conflict, the
value of CMP1n is not changed.
A reset signal generation sets this register to 00H.
timer count operation (TMHEn = 1) after the timer count operation was stopped (TMHEn = 0) (be
sure to set again even if setting the same value to CMP1n).
value is written) during timer count operation.
(n = 0 to 2)
(n = 0 to 2)
Symbol
CMP0n
Symbol
CMP1n
Address: FF18H (CMP00), FF1AH (CMP01), FF44H (CMP02)
Address: FF19H (CMP10), FF1BH (CMP11), FF45H (CMP12)
Figure 8-4. Format of 8-Bit Timer H Compare Register 0n (CMP0n)
Figure 8-5. Format of 8-Bit Timer H Compare Register 1n (CMP1n)
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7
CHAPTER 8 8-BIT TIMERS H0, H1, AND H2
6
6
User’s Manual U18698EJ1V0UD
5
5
4
4
3
3
After reset: 00H
After reset: 00H
2
2
1
1
R/W
R/W
0
0