UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 342

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

14.3 Registers Controlling Serial Interface UART6
(1) Asynchronous serial interface operation mode register 6 (ASIM6)
342
Address: FF50H After reset: 01H R/W
Serial interface UART6 is controlled by the following twelve registers.
Notes 1.
Symbol
ASIM6
This 8-bit register controls the serial communication operations of serial interface UART6.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 01H.
Remark ASIM6 can be refreshed (the same value is written) by software during a communication operation
Asynchronous serial interface operation mode register 6 (ASIM6)
Asynchronous serial interface reception error status register 6 (ASIS6)
Asynchronous serial interface transmission status register 6 (ASIF6)
Clock selection register 6 (CKSR6)
Baud rate generator control register 6 (BRGC6)
Asynchronous serial interface control register 6 (ASICL6)
Input switch control register (ISC)
Port function register 1 (PF1)
Port mode register 1 (PM1)
Port register 1 (P1)
Port mode register 11 (PM11)
Port register 11 (P11)
Figure 14-5. Format of Asynchronous Serial Interface Operation Mode Register 6 (ASIM6) (1/2)
2.
(when bits 7 and 6 (POWER6, TXE6) of ASIM6 = 1 or bits 7 and 5 (POWER6, RXE6) of ASIM6 = 1).
The output of the T
when POWER6 = 0 during transmission.
Asynchronous serial interface reception error status register 6 (ASIS6), asynchronous serial interface
transmission status register 6 (ASIF6), bit 7 (SBRF6) and bit 6 (SBRT6) of asynchronous serial
interface control register 6 (ASICL6), and receive buffer register 6 (RXB6) are reset.
POWER6
POWER6
RXE6
0
TXE6
<7>
Note 1
1
0
1
0
1
Disables operation of the internal operation clock (fixes the clock to low level) and asynchronously
resets the internal circuit
Enables operation of the internal operation clock
Disables transmission (synchronously resets the transmission circuit).
Enables transmission
Disables reception (synchronously resets the reception circuit).
Enables reception
TXE6
<6>
X
D6 pin goes high level and the input from the R
CHAPTER 14 SERIAL INTERFACE UART6
RXE6
<5>
User’s Manual U18698EJ1V0UD
Enables/disables operation of internal operation clock
Note 2
.
PS61
4
Enables/disables transmission
Enables/disables reception
PS60
3
CL6
2
X
D6 pin is fixed to the high level
SL6
1
ISRM6
0